Circuit Descriptions, Abbreviation List, and IC Data Sheets
9.
9.11.3 Diagram B7+B8+B9, Type GM1501 (IC7401, Genesis)
Figure 9-10 Internal block diagram and pin configuration
Infra-red Rx
Low
ndwid
DC
Ba
th
A
Pulse Width
Modulator
DDC2Bi
DVI
8/16 bit video
4:2:2/CCIR656
8/16/24 bit
video
(4:4:4/4:2:2/
CCIR656)
Test Pattern
Generator
Ultra-Reliable
DVI Rx
DVI-Compliant
Input
Triple ADC
and PLL
14.318 MHz
Crystal
Reference
Image
Capture
and
Measure
ment
RealColor
TM
Graphics
Shrink
Filter
Clock
Generation
Frame
Store
Control
JTAG
GPIO
2-wire
Serial I/F
External
ROM I/F
Internal
ROM
TTL/
LVDS
Tx
Display
Timing
Generator
OSD
Controller
Color Table
RAMs
Output
Blender
Video
Shrink
Filter
Motion
Adapt.
3:2/2:2
detection
Video
Zoom
Filter
Graphics
Zoom
Filter
Image
Capture
and
Measure
ment
Internal
RAM
X186
Micro-
controller
Interface
Parallel
ROM
IF/external
micro
Analog RGB
Input
Panel Data
/Control
DDC2Bi
analog
DDR SDRAM
I/F
Block Diagram
Pin Configuration
A
NC
ADC_3.3
ADC_1.8
ADC_1.8
ADC_DGND
RXC+
DVI_GND
RX0+
RX1+
RX2+
DVI_GND LBADC_IN3
D_GND
B
BLUE-
BLUE+
ADC_3.3
ADC_DGND
DVI_GND
RXC-
DVI_GND
RX0-
RX1-
RX2-
REXT
LBADC_IN2
D_GND
C
GREEN-
GREEN+
SOG
ADC_AGND
NC
DVI_3.3
DVI_GND
DVI_3.3
DVI_3.3
DVI_3.3
DVI_3.3
LBADC_IN1 LBADC_33
D
RED-
RED+
ADC_3.3 ADC_AGND
NC
DVI_1.8
DVI_GND
DVI_1.8
DVI_1.8
DVI_1.8
DVI_GND
LBADC_
RETURN
LBADC_GND
E
ADC_AGNDADC_AGND ADC_3.3 ADC_AGND
F
NC
VDDD33_
PLL
VSSA33_
RPLL
VDDA33_
RPLL
G
VDDA33_
FPLL
VSSD33_
PLL
TCLK
XTAL
H
VDDD33_
SDDS
VSSA33_
SDDS
VDDA33_
SDDS
VSSA33_
FPLL
J
VDDD33_
DDDS
VSSA33_
DDDS
VDDA33_
DDDS
VSSD33_
SDDS
K
RESETn
ACS_
RSET_HD
NC
VSSD33_
DDDS
CORE_1.8 CORE_1.8
D_GND
D_GND
L
OCM_INT2 OCM_INT1
AVSYNC
AHSYNC
D_GND
CORE_1.8
D_GND
D_GND
M
OCM_UDO OCM_UDI
IR0
IR1
D_GND
D_GND
D_GND
D_GND
N
VGA_SDA
VGA_SCL
DVI_SDA
DVI_SCL
D_GND
D_GND
D_GND
D_GND
P
OCM_CS1n OCM_CS2n MSTR_SDA MSTR_SCL
D_GND
D_GND
D_GND
D_GND
R
ROM_CSn OCM_REn OCM_WEn
EXTCLK
D_GND
D_GND
D_GND
D_GND
T
OCMADDR
17
OCMADDR
18
OCMADDR
19
OCM_CS0n
D_GND
CORE_1.8
D_GND
D_GND
U
OCMADDR
13
OCMADDR
14
OCMADDR
15
OCMADDR
16
CORE_1.8 CORE_1.8
D_GND
D_GND
V
OCMADDR
9
OCMADDR
10
OCMADDR
11
OCMADDR
12
W
OCMADDR
6
OCMADDR
7
OCMADDR
8
IO_3.3
Y
OCMADDR
3
OCMADDR
4
OCMADDR
5
IO_3.3
AA OCMADDR
0
OCMADDR
1
OCMADDR
2
IO_3.3
AB
OCMDATA13 OCMDATA14 OCMDATA15
IO_3.3
AC
OCMDATA10 OCMDATA11 OCMDATA12
IO_3.3
GPIO_G09_ B2
(
DEGRN0
)
IO_3.3
DCLK
IO_3.3
GPIO_G07_ B2
(
DERED4
)
IO_3.3
SHIELD[1]
(DEGRN3)
LVDSB_3.3
LVDSB_GND
AD OCMDATA9OCMDATA6OCMDATA3OCMDATA0
GPIO_G09_ B3
(
DEGRN1
)
GPIO_G08_ B0
(
DORED0
)
DEN
GPIO_G08_ B5
(
DOBLU1
)
GPIO_G07_ B3
(
DERED5
)
GPIO_G07_ B6
(
DERED8
)
SHIELD[2]
(DEGRN4)
LVDSB_3.3 LVDSB_3.3
AE OCMDATA8OCMDATA5OCMDATA2
GPIO_G09_ B0
(
DERED0
)
GPIO_G09_ B4
(
DEBLU0
)
GPIO_G08_ B1
(
DORED1
)
GPIO_G08_ B3
(
DOGRN1
)
GPIO_G07_ B0
(
DERED2
)
GPIO_G07_ B4
(
DERED6
)
GPIO_G07_ B7
(
DERED9
)
SHIELD[3]
(DEGRN5)
BC+
(DEGRN8)
SHIELD[4]
(DEBLU2)
AF OCMDATA7OCMDATA4OCMDATA1
GPIO_G09_ B1
(
DERED1
)
GPIO_G09_ B5
(
DEBLU1
)
GPIO_G08_ B2
(
DOGRN0
)
GPIO_G08_ B4
(
DOBLU0
)
GPIO_G07_ B1
(
DERED3
)
GPIO_G07_ B5
(
DERED7
)
SHIELD[0]
(DEGRN2)
B3+
(DEGRN6)
B3-
(DEGRN7)
BC-
(DEGRN9)
1
2
3
4
5
6
7
8
9
10
11
12
13
E_14490_099.eps
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