Panasonic KX-TDA100AL, Service Manual

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Pin
No.
Pin Name I/O Description
77 A20 O Address bus
78 A21 O Address bus
79 Vss - Power supply (0V)
- Vss O Power supply (0V)
80 A22 O Address bus
81 Vss - Power supply (*3)
- Vss - Power supply (*3)
82 A23 O Address bus
83 VssQ - Power for I/O (0V)
84 A24 O Address bus
85 VssQ - Power for I/O (3.3V)
86 A25 O Address bus
87 BS/PTK[4] O/I/O Bus cycle start signal/I/O port K
88 RD O Read stroke
89 WE0/DQMLL O D7-D0 select signal/DOM (SDRAM)
90 WE1/DQMLU/WE O D15-D8 select signal/DOM (SDRAM)
91 WE2/DQMUL/
ICIORD/PTK[6] O/I/O D23-D16 select signal/DOM (SDRAM) /PCMCIA I/O read/I/O
port K
92 WE3/DQMUU/
ICIOWR/PTK[7] O/I/O D31-D24 select signal/DOM (SDRAM) /PCMCIA I/O write/I/O
port K
93 RD/WR O Read/Write
94 AUDSYNC/
PTE[7] O/I/O AUD synchronization/I/O port E
95 VssQ - Power for I/O (0V)
96 CS0/MCS[0] O Chip select 0/mask ROM chip select 0
97 VccQ - Power for I/O (3.3V)
98 CS2/PTK[0] O/I/O Chip select 2/I/O port K
99 CS3/PTK[1] O/I/O Chip select 3/I/O port K
100 CS4/PTK[2] O/I/O Chip select 4/I/O port K
101 CS5/PTK[3] O/I/O Chip select 5/CE1 (Area 5PCMCIA)/I/O port K
102 CS6/CE1B O Chip select 6/CE1 (Area 6PCMCIA)
103 CE2A/PTE[4] O/I/O CE2(Area 5PCMCIA)/ I/O port K
104 CE2B/PTE[5] O/I/O CE2(Area 6PCMCIA)/ I/O port K
105 CKE/PTK[5] O/I/O CK Enable (SDRAM) / I/O port K
106 RAS3L/PTJ[0] O/I/O RAS for low 32M/64M bytes address (SDRAM) /I/O port J
107 PTJ[1] I/O I/O port J
108 CASL/PTJ[2] O/I/O RAS for low 32M/64M bytes address (SDRAM) /I/O port J
109 VssQ - Power for I/O (0V)
110 CASU/PTJ[3] O/I/O RAS for low 32M bytes address (SDRAM) /I/O port J
111 VssQ - Power for I/O (3.3V)
112 PTJ[4] I/O I/O port J
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