Panasonic KMS1409096CE, Service Manual

Page: 63 / 191

63
KX-NS500AG
S R A M D[8]
S R A M *WE
S R A M *OE
S R A M GP_ A [1]
S R A M *C S
K X -N S 500 A G CPU BO A RD No. 2 2 / 2
C
E
B
A
D
F
6 4 5 8 7
GP_D[ 7 ]
GP_D[ 6 ]
GP_D[5]
GP_ A [0- 2 1]
GP_D[4]
GP_D[3]
GP_D[ 2 ]
GP_D[1]
GP_D[0]
GP_D[0]
GP_D[1]
GP_D[ 2 ]
GP_D[3]
GP_D[ 7 ]
GP_D[4]
GP_D[5]
GP_D[ 6 ]
GP_D[15]
GP_D[14]
GP_D[1 2 ]
GP_D[13]
GP_D[8]
GP_D[10]
GP_D[9]
GP_D[11]
GP_ A [ 6 ]
GP_ A [5]
GP_ A [4]
GP_ A [3]
GP_ A [ 2 ]
GP_ A [1]
GP_D[8]
GP_D[9]
GP_D[11]
GP_D[10]
GP_D[13]
GP_D[15]
GP_D[1 2 ]
GP_D[14]
GP_ A [14]
GP_ A [15]
GP_ A [1 7 ]
GP_ A [1 6 ]
GP_ A [18]
GP_ A [5]
GP_ A [4]
GP_ A [ 2 ]
GP_ A [1]
GP_ A [3]
GP_ A [ 6 ]
GP_ A [ 7 ]
GP_ A [8]
GP_ A [10]
GP_ A [9]
GP_ A [13]
GP_ A [1 2 ]
GP_ A [11]
GP_D[0-15]
GP_D[0- 7 ]
nC S _ S R A M
+15 V
DG
DG
DG
DG
+3.3 V D
DG
CN 2 0 2 15
CN 2 0 2
1 7
CN 2 0 2 59
CN 2 0 2 7 0
CN 2 0 2
8
CN 2 0 2
6 4
CN 2 0 2 2
4
CN 2 0 2 35
CN 2 0 2 7 8
CN 2 0 2 50
CN 2 0 2 77
CN 2 0 2 7 9
CN 2 0 2 4 6
CN 2 0 2 45
CN 2 0 2 34
CN 2 0 2 7 1
CN 2 0 2 58
CN 2 0 2 6 3
CN 2 0 2 62
CN 2 0 2 19
CN 2 0 2 80
CN 2 0 2 2
CN 2 0 2 43
CN 2 0 2 76
CN 2 0 2 6 9
CN 2 0 2 54
CN 2 0 2 6
CN 2 0 2 39
CN 2 0 2 31
CN 2 0 2 2 9
CN 2 0 2 26
CN 2 0 2 1 6
CN 2 0 2 18
CN 2 0 2 3 6
CN 2 0 2 5 6
CN 2 0 2 49
CN 2 0 2 4 7
CN 2 0 2 6 8
CN 2 0 2 14
CN 2 0 2
5 2 901-08 7 4
1
CN 2 0 2 1 2
CN 2 0 2 7
CN 2 0 2 7 3
CN 2 0 2 22
CN 2 0 2 2 0
CN 2 0 2 7 4
CN 2 0 2 3 2
CN 2 0 2 2 8
CN 2 0 2 4
CN 2 0 2 7 5
CN 2 0 2
72
CN 2 0 2 53
CN 2 0 2 11
CN 2 0 2 30
CN 2 0 2 41
CN 2 0 2 67
CN 2 0 2 3 7
CN 2 0 2 9
CN 2 0 2 13
CN 2 0 2 3
CN 2 0 2 66
CN 2 0 2 10
CN 2 0 2 2 5
CN 2 0 2 44
CN 2 0 2 33
CN 2 0 2 6 1
CN 2 0 2 5 2
CN 2 0 2 4 2
CN 2 0 2 2
3
CN 2 0 2 2 1
CN 2 0 2 38
CN 2 0 2
48
CN 2 0 2
5 7
CN 2 0 2
5
CN 2 0 2 6 5
CN 2 0 2 40
CN 2 0 2
55
CN 2 0 2 27
CN 2 0 2 6 0
CN 2 0 2 51
TDM0_DR_D S P 004: 2 D
L A N_R X _ X P_D S P 003:8 A
TDM0_CK_D S P
004: 2 D
nWE 005:4E
TDM0_F S _D S P 004: 2 D
TDM0_D X _D S P 004: 2 D
L A N_T X _ X P_D S P 003:8 A
nRD 005:4F
L A N_T X _ X M_D S P 003:8
A
GP_ A [0- 2 1] 005:3C
L A N_R X _ X M_D S P 003:8
A
C 2 14 0.01u 1 6 NC
R 2 5 7
10
1
2
3
4 5
6
7
8
R 26 1 0
C 2 1 2 0.1u 50
R 26 3 0
R 2 4 7 1 k
R 2 4 6 1 k
R 2 50 10 C 2 08
0.1u 1 6
C 2 13 100p
R 2 54
10
1
2
3 6
7
8
R 2 48 10
R 267 10
R 26 5 10
R 2 59 0
R 2 49 10
R 2 5 2
10
1
2
3 6
7
8
R 2 51
10
1
2
3
4 5
4 5
4 5
4 5
6
7
8
R 2 58
E X B 2 8 V 100 JX
10
1
2
3
4 5
6
7
8
R 2 55
10
1
2
3
4 5
6
7
8
R 26 4 10
C 2 10
0.1u 1 6
R 262 0
R 266 10
R 2 5 6
10
1
2
3
4 5
6
7
8
R 2 53
10
1
2
3 6
7
8
R 26 0 0
DG
DG
+3.3 VA _FROM_D S P
PMIC_nPOR
003: 2 E;00 6 : 6 E
nRE S ET_D S P_PH Y
004:5D
nRE S ET_D S P 004:5D
R
22
1
0
R
2
43
0
NC
TDM1_D X _D S P
004: 2 D
TDM1_DR_D S P
004: 2 D
GP_D[0- 7 ] 005:3B
IC 2 0 6
EM 6 43F V 1 6 FU-55LF
1
A 4
2 A
3
4 2
A7
43
A6
3
A2
44
A 5
4
A 1
41
*OE
5
A 0
40
*UB
6
*C S
39
*LB
7
D Q 0
38
D Q 15
8 D
Q 1
3 7
D Q 14
9 D
Q2
3 6
D Q 13
10 D
Q 3
35
D Q 1 2
11
V CC1
34
VSS2
1 2 VSS
1
33
V CC 2
13 D
Q 4
3 2
D Q 11
14 D
Q 5
31
D Q 10
15 D
Q6
30
D Q 9
1 6
D Q7
2 9
D Q 8
1 7
*WE
2 8
NC
18
A 1 7
27
A 8
19
A 1 6
26
A 9
2 0
A 15
2 5
A 10
2 1
A 14
2 4
A 11
22 A
13
2 3
A 1 2
+3.3 V D_B
DG
DG
IC 2 0 7
S N 7 4L V C1G04DCKR
1 NC
2
A
3 GND
5
V CC
4
Y
IC 2 08
S N 7 4L V C1G3 2 DCKR
1 A
2
B
3
GND
5
V CC
4
Y
C
2
11
0.1u
1
6 C
2
09
0.1u
1
6
IC 2 01
I-EP4CE40F 2 3C8N-1
G4 IO1
G3 IO
2
B 2
IO3
B1 IO4
G5 IO5
E4 IO
6 /*RE S ET
E3 IO
7
C 2
IO8
C1 IO9
D 2
IO10
D1 IO11/D
A T A 1/ AS DO
H 7
IO1 2
H 6
IO13
J6
IO14
E 2
IO15/*FL AS H_CE/*C S O
E1 IO1
6
F 2
IO1 7
F1 IO18
H8 IO19
J 8 IO
2 0
J 5 IO
2 1
K 6
* S T A TU S
H5 IO
22
L8 IO
2 3
K8 IO
2 4
J7
IO 2 5
K 7
IO 26
J 4 IO
27
H 2
IO 2 8
H1 IO
2 9
J 3 IO30
J2
IO31
J 1 IO3
2
K 2
DCLK
K1 IO33/D
A T A 0
K5 *CONFIG
L5 TDI
L 2
TCK
L1 TM
S
L4 TDO
L3 *CE
G1 CLK1
DG
L A N_R X _ X M1
B40
D A T A [ 2 ]
nH A LT(reserved)
DG
DG
DG
L A N_R X _ X P1
The PIN n am e is a n am e seen f ro m CPU side.
DG
A D[5]
TDM0_F S _D S P
nC S _D S P[1]
L A N_T X _ X M1
DG
A D[ 6 ]
DG
A D[3]
D S P_nR S T
A D[4]
D A T A [ 7 ]
TDM0_DR_D S P
D A T A [10]
DG
(TDM1_CK)
+15 V
DG
C A RD_ID[ 2 ]
TDM0_D X _D S P
D A T A [11]
DG
A D[ 2 ]
L A N_T X _ X P1
D A T A [13]
DG
nINT_D S P0
nC S _D S P[0]
nR S T_PORT_PH Y
A 1
D A T A [14]
TDM1_D X _D S P
A D[ 7 ]
DG
D S P_CON_No.
+3.3 VA
D A T A [1 2 ]
nINT_D S P1
D A T A [8]
C A RD_ID[4]
nBE[1]
D A T A [15]
D A T A [9]
TDM0_CK_D S P
DG
C A RD_ID_nOE
(TDM1_F S )
nPRE S NT
(DG)
DG
DG
nWE
D A T A [ 6 ]
C A RD_ID[3]
DG
C A RD_ID[5]
TDM1_DR_D S P
N.C. N.C.
C A RD_ID[0]
DG
D A T A [0]
C A RD_ID[ 6 ]
B_CLK_ 66 M
A 40
DG
DG
B1
nBE[0]
D A T A [4]
D A T A [1]
+15 V
D A T A [5]
D A T A [3]
A D[1]
C A RD_ID[1]
DG
nRD
(No use)
D S P CONNECTOR
S R A M 51 2 MB
(No use)
N.C.
N.C.
N.C.
nC S _D S P1
nC S _D SS 0
nINT_D S P0
nINT_D S P1
nWR_D S P_option
FPG A
(1)
( 2 )
(3)
(4)
(5)
( 6 )
( 7 )
(8)
(9)
(10)
(11)
(1 2 )
(13)
(14)
(15)
(1 6 )
(1 7 )
1 2