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LTDVE4CH-20 | INSTRUCTIONS MANUAL
Figure 4: diagram of internal logic network
The four synchronization inputs are shown at the left (TR1, TR2, TR3 and TR4), while the four light
outputs (LD1, LD2, LD3 and LD4) and the four synchronization outputs (SH1, SH2, SH3 and SH4)
are drawn at the right.
A description of each of the blocks is given in the next sections.
12.2. Input filters
The input filters are used to debounce and remove glitches from the incoming synchronization inputs.
Each of the four synchronization inputs has a dedicated, independent filter.
The algorithm implemented in each of the filters processes the relevant synchronization input with a
finite state machine. A change in the filter output is performed only when the input signal has
remained constant for a defined period of time, called filter time constant. Any pulses shorter than
the filter time constant are thus removed and not passed through.
The diagram in
Figure 5: operation of the input filter
shows the filter operation on a random input
signal.
Figure 5: operation of the input filter
As visible, the input signal is filtered by looking for pulses that hold the same state for a time of at
least
Tfilter
before the change in state is passed to the output. Please note there is a fixed input to
output propagation delay equal to this filter time constant.
Each of the four filters can be set as follows:
input
Tfilter
output
Tfilter
Tfilter
Tfilter
