Onkyo TX-SR804, Service Manual

Page: 126 / 237

IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -32
Q8003: IC42S32200L (64-Mbit Synchronous Dynamic RAM)
BLOCK DIAGRAM
TX-SR804/804E
COLUMN
C O U N T E R
A D D R E S S
B U F F E R
A 0
A 9
B S 0
B S 1
D Q M 0 ~ 3
C L O C K
B U F F E R
COMMAND
D E C O D E R
Sense Amplifier
Row Decoder
Row Decoder
CLK
C K E
C S #
R A S #
C A S #
W E #
D Q 0
D Q 31
Row Decoder
2048 X 256 X 32
CELL ARRAY
(BANK #2)
D Q
B U F F E R
A 1 0 / A P
R E F R E S H
C O U N T E R
M O D E
R E G I S T E R
C O N T R O L
S I G N A L
G E N E R AT O R
C o l u m n D e c o d e r
2 0 4 8 X 2 5 6 X 3 2
C E L L A R R AY
( B A N K # 0 )
2 0 4 8 X 2 5 6 X 3 2
C E L L A R R AY
( B A N K # 1 )
2048 X 256 X 32
CELL ARRAY
(BANK #3)
Row Decoder
C o l u m n D e c o d e r
C o l u m n D e c o d e r
Sense Amplifier
Sense Amplifier
Sense Amplifier
C o l u m n D e c o d e r