TX-SR604/604E/8460
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS -32
Q8501 : SiI9033 (HDMI Receiver)
BLOCK DIAGRAM
24-Bit Data
HS,VS,DE
PanelLink
TMDS
Digital
Core
TM
R0XC
R0X0
R0X1
R0X2
DSDA0
DSDA1
DSCL0
DSCL1
R1XC
R1X0
R1X1
R1X2
Port
MUX
I2C
Slave
PanelLink
TMDS
Digital
Core
TM
HDCP
Wmbedded Keys
HDCP &
Repeater
Decryption
Engine
Port
MUX
XOR
Mask
Registers
-------------
Configuration
Logic Block
I2C
Slave
Aux
Data
MCLK
Gen
HDMI
Mode
Control
Audio
Data
Decode
Port
Detect
Auto A/V
Exception
Handling
Video Color
Space
Converter
Up/Down
Sampling
24-Bit Data
H8,V8,DE
24-Bit Encrpted
Pixel DataR
Control Signals
24-Bit
Decrypted
Pixel Data
R0PWR5V
R1PWR5V
RESET#
INT
CSDA
CSCL
XTALIN
MCLKOUT
XTALOUT
SCK
WS
SD[3:0]
SPDIF
DCLK
DL[3:0]
DR[3:0]
EVNODD
DE
HSYNC
VSYNC
ODCK
Q[23:0]
CLK48B
MUTEOUT
SCDT
24
Summary of Contents for TX-SR604
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