TX-L55/LR552
IC BLOCK DIAGRAMS AND DESCRIPTIONS
CS494003(Audio Decoder DSP)
FILT1 -
Phase-Locked Loop Filter
FILT2 -
Phase Locked Loop Filter
XTALO -
Crystal Oscillator Output
CLKSEL -
DSP Clock Select
FA0, FSCCLK -
Host Parallel Address Bit Zero or Serial Control Port Clock
FDAT0~FDAT7 -
DSPAB Bidirectional Data Bus
CLKIN, XTALI -
External Clock Input/Crystal Oscillator Input
FA1, FSCDIN -
Host Address Bit One or SPI Serial Control Data Input
FHS2, FSCDIO, FSCDOUT -
Mode Select Bit 2 or Serial Control Port Data Input and
FSCLKN1, STCCLK2 -
PCM Audio Input Bit Clock
FHS1, FRD, FR/W -
Mode Select Bit 1 or Host Parallel Output Enable or Host Parallel R/W
FHS0, FWR, FDS -
Mode Select Bit 0 or Host Write Strobe or Host Data Strobe
FCS -
Host Parallel Chip Select, Host Serial SPI Chip Select
FINTREQ -
Control Port Interrupt Request
FLRCLKN1 -
PCM Audio Input Sample Rate Clock
FSDATAN1 -
PCM Audio Data Input One
CMPCLK, FSCLKN2 -
PCM Audio Input Bit Clock
CMPDAT, FSDATAN2 -
PCM Audio Data Input Number Two
FDBCK -
Reserved
FDBDA -
Reserved
PLLVDD -
PLL Supply Voltage
PLLVSS -
PLL Ground Voltage
RESET -
Master Reset Input
TEST -
Reserved
MCLK -
Audio Master Clock
SCLK0 -
Audio Output Bit Clock
SCLK1 -
Audio Output Bit Clock
LRCLK0 -
Audio Output Sample Rate Clock
LRCLK1 -
Audio Output Sample Rate Clock
AUDATA0 -
Digital Audio Output 0
AUDATA1 -
Digital Audio Output 1
AUDATA2 -
Digital Audio Output 2
AUDATA3, XMT958A -
Digital Audio Output 3, S/PDIF Transmitter
SD_ADDR0~SD_ADDR10, EXTA0~EXTA10 -
SDRAM Address Bus, SRAM External Address Bus
SD_CLK_OUT -
SDRAM Clock Output
SD_CLK_IN -
SDRAM Re-timing Clock Input
SD_CLK_EN -
SDRAM Clock Enable
SD_DATA0~SD_DATA7, EXTD0~EXTD7 -
SDRAM Data Bus, SRAM External Data Bus
SD_BA, EXTA19 -
SDRAM Bank Address Select, SRAM External Address Bus
SD_CS -
SDRAM Chip Select
SD_RAS -
SDRAM Row Address Strobe
AUDATA4, GPIO28 -
Digital Audio Output 4, General Purpose I/O
AUDATA5, GPIO29 -
Digital Audio Output 5, General Purpose I/O
AUDATA6, GPIO30 -
Digital Audio Output 6, General Purpose I/O
AUDATA7, XMT958B, GPIO3 -
Digital Audio Output 7, S/PDIF Transmitter, General Purpose I/O
DBCK -
Debug Clock
DBDA -
Debug Data
SLCKN, GPIO22 -
PCM Audio Input Bit Clock, General Purpose I/O
LRCLKN, GPIO23 -
PCM Audio Input Sample Rate Clock, General Purpose I/O
SDATAN0, GPIO24 -
PCM Audio Input Data, General Purpose I/O
SDATAN1, GPIO25 -
PCM Audio Input Data, General Purpose I/O
SDATAN2, GPIO26 -
PCM Audio Input Data, General Purpose I/O
SDATAN3, GPIO27 -
PCM Audio Input Data, General Purpose I/O
SCCLK -
Serial Control Port Clock
SCDIN -
SPI Serial Control Data Input
SCDOUT, SCDIO -
Serial Control Port Data Input and Output
HDATA1~HDATA7, GPIO1~GPIO7 -
DSPC Bidirectional Data Bus, General Purpose I/O
INTREQ -
Control Port Interrupt Request
A0, GPIO13 -
Host Parallel Address Bit 0, General Purpose I/O
A1, GPIO12 -
Host Address Bit 1, General Purpose I/O
HINBSY, GPIO8 -
Input Host Message Status, General Purpose I/O
SD_DATA8~SD_DATA15, EXTA11~EXTA18 -
SDRAM Data Bus, SRAM External Address Bus
SCS -
Host Serial SPI Chip Select
RD, R/W, GPIO11 -
Host Parallel Output Enable, Host Parallel R/W, General Purpose I/O
WR, DS, GPIO10 -
Host Write Strobe, Host Data Strobe, General Purpose I/O
CS, GPIO9 -
Host Parallel Chip Select, General Purpose I/O
SD_DQM1 -
SDRAM Data Mask 1
SD_DQM0 -
SDRAM Data Mask 2
NV_WE, GPIO16 -
SRAM Write Enable, General Purpose I/O
UHS2, CS_OUT, GPIO17 -
Mode Select Bit 2, External Serial Memory Chip
SD_CAS -
SDRAM Column Address Strobe
SD_WE -
SDRAM Write Enable
NV_CS, GPIO14 -
SRAM Chip Select, General Purpose I/O
NV_OE, GPIO15 -
SRAM Output Enable, General Purpose I/O
UHS0, GPIO18 -
Mode Select Bit 0, General Purpose I/O
UHS1, GPIO19 -
Mode Select Bit 1, General Purpose I/O
GPIO20 -
General Purpose I/O
GPIO21 -
General Purpose I/O
VDD[7:1] -
2.5V Supply Voltage
VSS -
2.5V Ground
NC[5:1] -
No Connect
VDDSD[4:1] -
3.3V SDRAM/SRAM/EPROM Interface Supply
VSSSD -
3.3V SDRAM/SRAM/EPROM Interface Ground
Output, Parallel Port Type Select
Select, G
eneral Purpose I/O
