TX-SR606
IC BLOCK DIAGRAMS AND TERMINAL DESCRIPTIONS-20
Q8001
: FLI30502
(LCD TV Controller with Worldwide Sandard Sound Processor
and HDMI Receiver)-2/12
PIN LAYOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
VDDA33_LBADC
LBADC_IN1
LBADC_IN2
LBADC_IN3
LBADC_IN4
LBADC_IN5
VSSA33_LBADC
RESETn
VBUFC_RPLL
VDD_RPLL_18
GND_RPLL
XTAL
TCLK
AVDD_RPLL_33
VSYNC1_VGA
HSYNC1_VGA
STI_TM2
GPIO15/STI_TM1/EXT_CSn
SCART16
CVDD_18
CRVSS
HOST_SCLK/UART_DI/JTAG/_CLK
HOST_SDATA/UART_DO/JTAG_MODE
DDC_SCLK
DDC_SDATA
CVDD_18
CRVSS
MSTR_SCLK
MSTR_SDATA
RVDD_33
CRVSS
GPIO0
GPIO1
GPIO2
GPIO3
GPIO6/Rin
CVDD_18
CRVSS
GPIO7/IRQin
GPO8/IRQout
GPIO9/SIPC_SCLK/A19
GPIO10/SIPC_SDSATA/A20
CVDD_18
CRVSS
GPIO11/PWM0
GPIO12/PWM1
RVDD_33
CRVSS
GPIO13/PWM2/JTAG_RESET
GPIO14/PWM3/SCART16_1
CVDD_18
CRVSS
GPIO4/VIDIN_HS
GPIO5/VIDIN_VS
VID2_CLK/ROM_OEn
VID_DE_FLD/A0/GPIO16
I2S_SPDIF_IN_DATA
192
191
190
189
188
187
186
185
184
183
182
181
180
179
178
177
176
175
174
173
172
171
170
169
168
167
166
165
164
163
162
161
160
159
158
157
156
155
154
153
152
151
150
149
148
147
146
145
144
143
142
141
140
139
138
137
136
136
134
133
132
131
130
129
VREFN
GND_AUD1
LS_OUT_SW
LS_OUT_R
LS_OUT_L
VDD_AUD1_33
AUD_OUT_R
AUD_OUT1_L
AUD_OUT2_R
AUD_OUT2_L
GND_HP
AUD_HP_OUT_R
AUD_HP_OUT_L
VDD_HP_33
HDMI_GND
HDMI_REXT
HDMI_18
HDMI_GND
HDMI_RX2P
HDMI_RX2N
HDMI_33
HDMI_RX1P
HDMI_RX1N
HDMI_GND
HDMI_18
HDMI_GND
HDMI_RX0P
HDMI_RX0N
HDMI_33
HDMI_RXCP
HDMI_RXCN
HDMI_GND
HDMI_18
CRVSS
CVDD_18
HDMI_12C_SCL
HDMI_12C_SDA
CEC/JTAG_TDI
HPD/JTAG_TDO
CRVSS
RVDD_33
VID_CLK_1
VID_DATA_IN_7
VID_DATA_IN_6
VID_DATA_IN_5
VID_DATA_IN_4
VID_DATA_IN_3
VID_DATA_IN_2
CRVSS
CVDD_18
VID_DATA_IN_1
VID_DATA_IN_0
D7/VID2_7
D6/VID2_6
D5/VID2_5
D4/VID2_4
D3/VID2_3
CRVSS
CVDD_18
D2/VID2_2
CRVSS
CVDD_18
D1/VID2_1
CRVSS
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
240
239
238
237
236
235
234
233
232
231
230
229
228
227
226
225
224
223
222
221
220
219
218
217
216
215
214
213
212
211
210
209
208
207
206
205
204
203
202
201
200
199
198
197
196
195
194
193
VOUT2
SVN
VDDA
C4P
GNDA
B4P
GNDA
A4P
GNDA
SV4P
GNDA
CN
GNDA
C3P
GNDA
B3P
VDDA
A3P
VDDA
SV3P
GNDA
BN
GNDA
C2P
GNDA
B2P
VDDA
A2P
VDDA
SV2P
GNDA
AN
GNDA
C1P
GNDA
B1P
GNDA
A1P
VDDA
SV1P
VDDA
SIF_IN1
GNDA
SIF_RTN
GNDA
SIF_IN2
VDDA
GND18_ABC_SC
VDD18_ABC_SC
GND_AUD_18
VDD_AUD_18
GND_AUD2
AUD_MONO_IN
AUD_IN_R1
AUD_IN_L1
AUD_IN_R2
AUD_IN_L2
AUD_IN_R3
AUD_IN_L3
AUD_IN_R3
AUD_IN_L3
VDD_AUD2_33
VREFP
VREFM
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
DEN/VOP_FLD
DHS/VOP_HS
DVS/VOP_VS
DCLK/VOP_CLK
PBIAS
PPWR
AVSS_LV
AVDD_LV_33
CH3P_LV_E/R0
CH3N_LV_E/R1
CLKP_LV_E/R2
CLKN_LV_E/R3
CH2P_LV_E/R4
CH2N_LV_E/R5
CH1P_LV_E/R6
CH11N_LV_E/R7
CH0P_LV_E/G0
CH0N_LV_E/G1
AVSS_OUT_LV
AVDD_OUT_LV_33
CH3P_LV_O/G2
CH3N_LV_O/G3
CLKP_LV_O/G4
CLKN_LV_O/G5
CH2P_LV_O/G6
CH2N_LV_O/G7
CH1P_LV_O/BO
CH1N_LV_O/B1
CH0P_LV_O/B2
CHON_LV_O/B3
AVSS_OUT_LV
AVDD_OUT_LV_33
PD20/B4/GPIO45
PD21/B5/GPIO46
PD22/B6/GPIO47
PD23/B7/GPIO48
CVDD_18
CRVSS
GPIO49/A18
ROM_SCSn/ROM_CSn
ROM_SCLK/A17
ROM_SDO/A16/OPM2
ROM_SDI/ROM_WEn
RVDD_33
CRVSS
EXT_ADC_CLAMP/A15/OPM1
XOSD_CLK/A14/OPM0
XOSD_HS/A13/FS1
XOSD_VS/A12/FS0
XOSD_FLD/A11/FT1
VBI_DATA_7/A10/FT0
VBI_DATA_6/BT2
VBI_DATA_5/BT1
VBI_DATA_4/A7/GPO23/BT0
DATA_3/A6/GPO22/OSCC_SEL
VBI_DATA_2/A5/GPIO21
VBI_DATA_1/A4/GPIO20
VBI_DATA/A3/GPIO19
VBI_VALID/A2/GPIO18
VBI_CLK/A1/GPIO17
D0/VID2_0
RVDD_33
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