One Stop Systems OSS-PCIe-HIB25-x4-H (Host), User Manual

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Appendix
Pin Assignments
Connectors PCIe x4 Card Edge Connector
•
The pins are numbered as shown with side A on the top of the centerline on the solder side of the board and side B on the
bottom of the centerline on the component side of the board.
•
The PCIe interface pins PETpx, PETnx, PERpx, and PERnx are named with the following convention: “PE” stands for PCIe
high speed, “T” for Transmitter, “R” for Receiver, “p” for positive (+), and “n” for negative (-).
•
Note that adjacent differential pairs are separated by two ground pins to manage the connector crosstalk.
Side B
Side A
Pin #
Name
Description
Name
Description
1 N/C N/C PRSNT1# Hot-Plug presence detect
2 N/C N/C N/C N/C
3 N/C N/C N/C N/C
4 GND Ground GND Ground
5 NC N/C N/C Not connected
6 N/C N/C JTAG3 TDI (Test Data Input)
7 GND Ground JTAG4 TDO (Test Data Output)
8 +3.3V 3.3 V power N/C Not connected
9 N/C Not connected N/C Not connected
10 3.3Vaux 3.3 V auxiliary power +3.3V 3.3 V power
11 N/C N/C PERST# Fundamental reset
Mechanical key
12 RSVD Reserved GND Ground
13 GND Ground
14 PETp0 REFCLK
Reference clock (differential
pair)
15 PETn0
Transmitter differential pair,
Lane 0
GND Ground
16 GND Ground PERp0
17 PRSNT2# Hot-Plug presence detect PERn0
Receiver differential pair, Lane 0
18 GND Ground GND Ground
19 PETp1 RSVD Reserved
20 PETn1
Transmitter differential pair,
Lane 1
GND Ground
21 GND Ground PERp1
22 GND Ground PERn1
Receiver differential pair, Lane 1
23 PETp2 GND Ground
24 PETn2
Transmitter differential pair,
Lane 2
GND Ground
25 GND Ground PERp2
Receiver differential pair Lane 2
One Stop Systems OSS-PCIe-HIB25-x4-H/T
Rev. A
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