NCP1215
http://onsemi.com
8
Figure 15. Feedback Loop − Current Sense Control
FB
17 k
Current
Mirror
4:3
37.5
m
A
12.5
m
A
CS
To Current Sense Comparator
The resulting current sense regulation characteristic can
be seen from Figure 16.
Figure 16. Current Sense Regulation Characteristic
CS Pin Source Current
12.5
m
A
50
m
A
140
m
A
100
m
A
50
m
A
0
m
A
FB Pin Sink Current
When the load goes light, the compression circuitry
decreases the peak current. This has the effect of slightly
increasing the switching frequency but the compression
ratio is selected to not hamper the standby power.
OFF Time Control
The loop signal together with the internal current source,
via an external capacitor, controls the switch−off time. This
is portrayed in Figure 17.
Figure 17. OFF Time Control
−
+
+
−
CT
Voffset
10
m
A
From Feedback Loop Block
V
offset
to V
DD
To Latch’s Set Input
To Latch’s Output
GND
CT
During the switch−ON time, the CT capacitor is kept
discharged by a MOSFET switch. As soon as the latch
output changes to a low state, the voltage across CT created
by the internal current source, starts to ramp−up until its
value reaches the threshold given by the feedback loop
demand.
Figure 18. CT
Pin Voltage (P
out
1
u
P
out
2
u
P
out
3)
V
offset
V
DD
V
CT Pin
Voltage
P
OUT
Goes Down
P
OUT
Goes Up
t
off−min
t
P3
P2
P1
The voltage that can be observed on CT pin is shown in
Figure 18. The bold waveform shows the maximum output
power when the OFF time is at its minimum. The IC allows
an OFF time of several seconds.
