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NB6N11SMNGEVB

http://onsemi.com

4

CML Outputs

Likewise, CML outputs need to be terminated to V

CC

 via

a 50 

W

 resistor. If no internal resistors are provided on the

device, 0402 chip resistor pads are provided on the bottom
side of the evaluation board to terminate the CML driver.  If
internal resistors are provided, the V

T

 pins should be wired

to V

CC

.

For CML lab setup and test, operation with negative

supply voltages is recommended to enable the 50 

W

 internal

impedance in the oscilloscope, or other measuring
instrument, to be used as a CML output termination; (V

CC

= 0 V, SMAGND = 0 V, and V

EE

/DUTGND = 

5.0 V,

3.3 V, 

2.5 V, or 

1.8 V).

LVDS Outputs

LVDS outputs are typically terminated with 100 

W

 across

the Q/Q output pair. The 100 

W

 can be added on the

QFN16EVB, but it is not provided on the board, since there
are several user dependent LVDS output measurement
techniques.

For LVDS lab setup and test, a single supply is typically

used, ie. V

CC

 = 3.3 V and DUTGND = 0 V.

Installing the SMA Connectors

Each configuration indicates the number of SMA

connectors needed to populate an evaluation board for a
given device. Each input and output requires one SMA
connector. Install all the required SMA connectors onto the
board and solder the center signal conductor pin to the board
on J1 through J16. Please note that the alignment of the
signal connector pin of the SMA connector to the metal trace
on the board can influence lab results. The launch and
reflection of the signals are largely influenced by imperfect
alignment and soldering of the SMA connector.

Validating the Assembled Board

After assembling the evaluation board, it is recommended

to perform continuity checks on all soldered areas before
commencing with the evaluation process. Time Domain
Reflectometry (TDR) is another highly recommended
validation test.

Summary of Contents for NB6N11SMNG

Page 1: ...e It should be used in conjunction with an appropriate ON Semiconductor device datasheet located at www onsemi com The datasheet contains the technical device specifications Board Layout The QFN16 Eva...

Page 2: ...1 Pin 2 Pin 3 Pin 4 Pin 13 Pin 14 Pin 15 Pin 16 Pin 8 Pin 7 Pin 6 Pin 5 DUT_GND SMA_GND VCC VEE DUTGND SMA_GND Figure 4 Evaluation Board Layout 4 Layer LAYER 1 TOP SIDE 1 OZ ROGERS 4003 0 008 in LAYE...

Page 3: ...ended to be tied to VEE DUTGND the negative supply of the device The positive power supply connector is labeled VCC Depending on the device the negative power supply nomenclature is labeled either GND...

Page 4: ...several user dependent LVDS output measurement techniques For LVDS lab setup and test a single supply is typically used ie VCC 3 3 V and DUTGND 0 V Installing the SMA Connectors Each configuration in...

Page 5: ...Yes No No No No Wire No No No No VCC No VEE VEE No No No No VCC VCC VCC VCC NOTE DUTGND VEE Exposed Pad and must be tied to DUTGND VEE CONFIGURATIONS SMAGND SMAGND VCC VEE DUTGND ExPad 12 11 10 9 1 2...

Page 6: ...t SMA connectors NOTE The test measurement device must contain 50 W termination VEE DUTGND Power Supply GND 0 V VCC Trigger Test Measuring Equipment Channel 1 Channel 2 DUTGND VEE ExPad SMAGND Table 2...

Page 7: ...4 http www keyelco com Chip Capacitor AVC Corporation 0603 0 01 mF 10 06035C103KAT2A na http www avxcorp com 0603 0 1 mF 10 0603C104KAT2A 6 Chip Resistor Panasonic 0402 50 W 1 Precision Thick Film Ch...

Page 8: ...NB6N11SMNGEVB http onsemi com 8 Figure 9 Gerber Files Top Layer Second Layer SMA_GND Plane...

Page 9: ...NB6N11SMNGEVB http onsemi com 9 Figure 10 Gerber Files Third Layer DUT_GND Trace Bottom Layer...

Page 10: ...support systems or any FDA Class 3 medical devices or medical devices with a similar or equivalent classification in a foreign jurisdiction or any devices intended for implantation in the human body Y...

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