NB3N1200KMNGEVB, NB3W1200LMNGEVB
http://onsemi.com
4
Control Pins
(Continued)
OE_n# Pins (Output Enable/Disable Function)
Six of the twelve differential outputs that have metal
traces going to SMA connectors have OE_n# pins on the left
side of the board that can be controlled manually using the
convenient High/Low OE_n# jumpers. See Figure 6.
All twelve of the OE_n#s can be controlled individually/
automatically by using the software GUI. GUI control is
accomplished via the USB when the OE_n# jumper is
installed on the middle header position. See Figure 6.
Figure 6. OE_n# Pins Schematic/PCB Configuration
OE#
OE#
VDD
J47
37
1
2
3
4
5
6
USB GUI
HI − Jumper to VDD
USB − Jumper to Mid
LO − Jumper to GND
100M_133M# - Frequency Selection (J55)
The 100M_133M# frequency selection pin can be
controlled manually with the High/Low header jumper J55,
H = 100 MHz, L = 133 MHz.
Figure 7. 100M_133M# Pin Schematic/PCB Configuration
VDD
4
J55
1
2
3
100M_133M_N
PWRGD/PWRDN# (J56)
The PWRGD/PWRDN# pin can be controlled manually
with the High/Low header jumper J56; H = PWRGD,
L = PWRDN#.
Figure 8. PWRGD/PWRDN# Pin Schematic/PCB Configuration
VDD
6
J56
1
2
3
PWRGD
