ON Semiconductor MT9V117PACSTCH-GEVB, User Manual

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MT9V117PACSTCH − GEVB
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Top View
Figure 3. Top View of Evaluation Board − Default Jumpers
UART Control JP9
ON_LED JP6
Configuration Switch SW2
+1V8_VDD JP3
+2V8_VAA JP1
Parallel O/P P6
ATEST JP8
RESET Switch SW1
+VDDIO_SEL JP4
+VDDIO JP5
EEPROM ADDR SW3
+VAAPIX JP2
CLK_SELECT JP7
Bottom View
Figure 4. Bottom View of the Evaluation Board − Connector
Baseboard Connector P2