AR0330CS
34
SLAVE MODE
The slave mode feature of the AR0330CS supports
triggering the start of a frame readout from a VD signal that
is supplied from an external ASIC. The slave mode signal
allows for precise control of frame rate and register change
updates. The VD signal is input to the trigger pin. Both the
GPI_EN (R0x301A[8]) and the SLAVE_MODE
(R0x30CE[4]) bits must be set to “1” to enable the slave
mode.
Figure 30. Slave Mode Active State and Vertical Blanking
OBRows (2, 4, or 8 rows)
Embedded Data Row(2 rows)
Active Data Rows
Frame Valid
VD Signal
S
tart of frame N
Blank Rows (2 rows)
Extra Vertical Blanking
(frame_length_lines
−
min_frame_length_lines)
The period between the
rising edge of the VD signal
and the slave mode ready
Extra Delay (clocks)
Slave Mode Active State
End of frame N
Start of frame N+ 1
state is T
FRAME
−
16 clocks.
Time
If the slave mode is disabled, the new frame will begin
after the extra delay period is finished.
The slave mode will react to the rising edge of the input
VD signal if it is in an active state. When the VD signal is
received, the sensor will begin the frame readout and the
slave mode will remain inactive for the period of one frame
time minus 16 clock periods (T
FRAME
−
(16 / CLK_PIX)).
After this period, the slave mode will re
−
enter the active
state and will respond to the VD signal.
