Omron SYSMAC CP Series, User Manual

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4-3
4 Understanding Programming
CP2E CPU Unit Software User’s Manual(W614)
4-
1
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rog
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m
m
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4
4-1-2 Prog
ram Capacity
The maximum program capacities of the CP2E CPU Units for all ladder programs (including symbol
table and comments) are given in the following table.
The total number of steps must not exceed the maximum program capacity.
It is possible to check the program size by selecting
Program - Memory View
in the CX-Programmer.
The size of a ladder instruction depends on the specific instruction and operands that are used.
This section describes the basics of programming for the CP2E.
Instructions are executed in the order that they are stored in memory (i.e., in the order of the mnemonic
code). Be sure you understand the concepts of ladder programming, and write the programs in the
proper order.
z
Basic Points in Creating Ladder Programs
Order of Ladder Program Execution
When the ladder diagram is executed by the CPU Unit, the execution condition (i.e., power flow)
flows from left to right and top to bottom.
The flow is different from that for circuits that consist of hard-wired control relays.
For example, when the diagram in figure A is executed by the CPU Unit, power flows as though the
diodes in brackets were inserted so that output R2 is not controlled by input condition D.
The actual order of execution is indicated on the right with mnemonics.
To achieve operation without these imaginary diodes, the diagram must be rewritten. Also, the power
flow in figure B cannot be programmed directly and must be rewritten.
4-1-2 Program Capacity
Unit type Model numbers Program capacity
E -type CPU Unit CP2E-E
††
D
†
-
†
4K steps
S -type CPU Unit CP2E-S
††
D
†
-
†
8 K steps
N -type CPU Unit CP2E-N
††
D
†
-
†
10K steps
4-1-3 Basics of Programming
Basic Concepts of Ladder Programming
A
B
A
C E
E
C D
B
E
(1) (6)
(2) ((3)) (4)
(9)
(7)
(10)
((8))
((5))
R1
R2
R1
R2
(6) A N D B
(7) OUT R1
(8) LD TR0
(9) A N D E
(10) OUT R2
(1) LD A
(2) LD C
(3) OUT TR0
(4) A N D D
(5) OR LD
Fig u re A (Good example)
Signal flo w
Fig u re B (Bad example)
Order of exec u tion (mnemonics)