3.3.2 AUX Control Register
(Read/Write): wBase+2
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0
Note. Refer to Sec. 3.1 for more information about wBase.
Aux?=0
Æ
this Aux is used as a D/I
Aux?=1
Æ
this Aux is used as a D/O
When the PC is first power-on, All Aux? signal are in Low-state. All Aux? are
designed as D/I for all PIO/PISO series. Please set all Aux? in D/I state.
3.3.3 AUX data Register
(Read/Write): wBase+3
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Aux7 Aux6 Aux5 Aux4 Aux3 Aux2 Aux1 Aux0
Note. Refer to Sec. 3.1 for more information about wBase.
When the Aux is used as D/O, the output state is controlled by this register. This
register is designed for feature extension, so don’t control this register now.
3.3.4 INT Mask Control Register
(Read/Write): wBase+5
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0 0 0 0 CN1_PC3 CN1_PC2 CN1_PC1
CN1_PC0
Note. Refer to Sec. 3.1 for more information about wBase.
PC0=0
Æ
Disable PC0 of CN1 as a interrupt signal (Default).
PC0=1
Æ
Enable PC0 of CN1 as a interrupt signal
outp(wBase+5,0); /* Disable interrupt */
outp(wBase+5,1); /* Enable interrupt CN1_PC0 */
outp(wBase+5,0x0f);/* Enable interrupt CN1_PC0,CN1_PC1,CN1_PC2,CN1_PC3 */
OME-PIO-D144 User’s Manual (Ver.2.1, Sep/2001)
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