–
1 × 16-bit motor control PWM timer with dead-time generation and
emergency stop
–
2 × watchdog timers (Independent and Window)
–
SysTick timer: a 24-bit downcounter
–
2 × 16-bit basic timers to drive the DAC
–
14 communication interfaces
–
2 × I
2
C interfaces (SMBus/PMBus)
–
5 USARTs (ISO 7816 interface, LIN, IrDA capability, modem control)
–
3 SPIs (18 Mbit/s), 2 with a multiplexed I
2
S interface that offers audio
class accuracy via advanced PLL schemes
–
2 × CAN interfaces (2.0B Active) with 512 bytes of dedicated SRAM
–
USB 2.0 full-speed device/host/OTG controller with on-chip PHY that
supports HNP/SRP/ID with 1.25 Kbytes of dedicated SRAM
–
10/100 Ethernet MAC with dedicated DMA and SRAM (4 Kbytes):
IEEE1588 hardware support, MII/RMII available on all packages
–
CRC calculation unit, 96-bit unique ID
Page4
Summary of Contents for STM32-H107
Page 5: ...BLOCK DIAGRAM Page5 ...
Page 6: ...MEMORY MAP Page6 ...
Page 8: ...BOARD LAYOUT Page8 ...
Page 14: ...MECHANICAL DIMENSIONS Page14 ...
Page 15: ...AVAILABLE DEMO SOFTWARE STM32F107_leds STM32H107_usb_OTG Page15 ...