40931201TH Rev. 4
170 /
6) Timing charts
■
Compatible mode
a) Data receiving timing
b) On-line
→
off-line switching timing by ON-LINE SW
c) Off-line
→
on-line switching timing by ON-LINE SW
PARALLEL DATA
(DATA BITs 1 to 8)
DATA STOROBE
ACKNOWLEDGE
BUSY
0.5
µ
s min.
0.5
µ
s min.
0.5
µ
s min.
0.5
µ
s max.
0.5
µ
s min.
0 min.
0 min.
0 min.
0.5
µ
s to 10
µ
s
0 min.
ON-LINE SW
BUSY
100 ms max.
SELECT
SELECT
ACKNOWLEDGE
ON-LINE SW
BUSY
0 min.
100 ms max.
0.5
µ
s to 10
µ
s
Summary of Contents for OKIPAGE18
Page 55: ...40931201TH Rev 4 55 Figure 3 3...
Page 69: ...40931201TH Rev 4 69 4 4 4 4 7 9 D 1 D 4 4 5 2 3 A 6 0 B C E 8 View A 2 F 3 Latch View A 5...
Page 86: ...40931201TH Rev 4 86 1 5 5 7 2 3 4 6 8 9 0 A D E F R G H I J K L M N R O P Q Q F B C...
Page 89: ...40931201TH Rev 4 89 2 B C D 3 4 5 F H I J L N F 6 7 9 0 1 8 A E G K M E...
Page 152: ...40931201TH Rev 4 152 Figure 6 6...
Page 156: ...40931201TH Rev 4 156 4 Flash ROM module BOARD FSL or BOARD FSL 2 ROM1 ROM0 EEPROM...
Page 243: ...40931201TH Rev 4 243 2 3 12 4 9 8 6 1 11 10 5 7 12 6 PARTS LIST...