OEC UroView
®
2800 Table/Generator Functional Block Diagrams
33
Periodic Maintenance
J9
J8
Generic
Interface PCB
J6
To J2 on Table/
Generator
Interface PCB
CAN Bus
&RTL lines
J10
AEC
Page 6 of 7
For Reference Only
07/01
SYS_CPUS.DS4
2800
System CPUs
Generator - Generic Interface PCB
g
KV Control Board
J10
J4
RTL (Real Time Line) Usage:
RTL1 - RESET (from system)
RTL2 - EXP_CMD (from system)
RTL3 - XRAY_ON (to system)
RTL4 - EXP_EN (from system)
RTL5 - AEC
RTL6 - RAD_PULSE (from system)
RTL7 - not used
RTL8 - not used
+15VDC
GND
U39
U12
U40
TXD_EXT_CAN_IF
RXD_EXT_CAN_IF
VCC_IF
DS6
3
1
U70
Micro
Processor
Tank
J7
J8
J9
J2
J3
J5
J6
J11
U72
SRAM
U64
BOOT
FLASH
U59
NVRAM
U71
FPGA
U68
EXTERNAL
CAN
U76
INTERNAL
CAN
U62
DSP
U63
CLOCK
DRIVER
U73, 74
APPS.
FLASH
U51-
U54
A/D
U37
SER
A/D
CONV.
U40
SER
D/A
CONV
U67
BOOT
AUTO
CONFIG
BDM
Test
LVPS
DS4
TP4
int-15V
TP1,2,5,9
TP3
3.3V
Not Used
Not Used
TP6
+5V
TP7
int+15V
TP8
+1.8V
DS3
DS7
DS2
DS5
DS6
J1
System CPUs – Generator – Generic Interface PCB
