NXP Semiconductors
AH1721
SJA1105SMBEVM UM
AH1721
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2018. All rights reserved.
User Manual
Rev. 1.00
— 16 July 2018
7 of 35
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1 e200Z2 32bit core with 80MHz
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6MB on-chip flash and 768kB internal RAM
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2 independent 100Mbps ethernet ports with AVB and 1588 support
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6 SPI, 18 LIN/UART, 8 CAN (with FD support), 4 I2C and USB peripheral blocks
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Standard microcontroller infrastructure, like interrupt controller, DMA, timer,
watchdog, JTAG debug interface, etc.
For making the task to create user’s software easier, there is an example project, which
initializes all peripherals on the SJA1105SMBEVM and implements basic functions, like
communicating via the USB-UART adapter, configuring the PHYs and switches, sending
and receiving ethernet packets, sending and receiving CAN frames, dealing with PHY
plug events, etc. This example project serves as a foundation for user extensions for
specific applications.
The SW development environment and the example project is described in chapter 6.
4.3 SJA1105S switches
The SJA1105S is an IEEE 802.3-compliant 5-port automotive Ethernet switch supporting
Audio Video Bridging (AVB) and Time-Sensitive Networking (TSN) standards. It is a
member of the SJA1105P/Q/R/S family of switches:
Table 1.
SJA1105P/Q/R/S variants
Device
SGMII interface
TT-Ethernet and TSN-Ethernet
SJA1105P
No
No
SJA1105Q
No
Yes
SJA1105R
Yes
No
SJA1105S
Yes
Yes
The SJA1105S’s fifth port is a SGMII-only port and is capable to operate at up to 1Gbps.
The other four ports can be individually configured to operate at 10Mbps, 100Mbps or
1Gbps, depending on the capability and configuration of the PHY connected. Interfacing
a PHY to one of these four ports can be done using one of the 3 supported MII interface
standards: MII, RMII or RGMII.
This port arrangement provides the flexibility to connect a mix of PHY devices such as
the TJA110x 100BASE-T1 PHYs from NXP Semiconductors and other commercially
available Fast Ethernet and Gigabit Ethernet PHYs, or fiber optic PHYs. The high-speed
interface makes it easy to cascade multiple switches of the SJA1105 family for
scalability. It can be used in various automotive scenarios such as gateway applications,
body domain controllers or for interconnecting multiple ECUs in a daisy chain. Full Audio
Video Bridging (AVB) support means that the SJA1105 family can be used in
infotainment and driver assistance systems. Time-triggered Ethernet and Time-Sensitive
Networking support with IEEE 802.1Qbv time-aware traffic shaping and IEEE 802.1Qci
per-stream policing makes the SJA1105 family usable in applications with hard realtime
communication requirements.
In the SJA1105SMBEVM design, the switches are used in a cascaded topology: the
SGMII ports are connected to create a high-speed link for forwarding payload ethernet
frames and management data frames. Cascading also includes HW provisions to
synchronize the PTP clock counter by using a master/slave clock configuration.
The usage of the switches’ ports is shown in Table 2.
