NXP Semiconductors SC18IS606-EVB User Manual Download Page 2 | Manualshive

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NXP Semiconductors SC18IS606-EVB User Manual Download Page 2

NXP Semiconductors

UM11666

SC18IS606-EVB evaluation board

Rev

Date

Description

v.1.0

20210928

Initial version

Revision history

UM11666

All information provided in this document is subject to legal disclaimers.

© NXP B.V. 2021. All rights reserved.

User manual

Rev. 1.0 — 28 September 2021

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Summary of Contents for SC18IS606-EVB

Page 1: ...C to SPI SC18IS602 SPI Controller SPI master I 2 C bridge SPI bridge Abstract SC18IS606 is designed to serve as an interface between a standard I 2 C bus of a microcontroller and an SPI bus This allow...

Page 2: ...valuation board Rev Date Description v 1 0 20210928 Initial version Revision history UM11666 All information provided in this document is subject to legal disclaimers NXP B V 2021 All rights reserved...

Page 3: ...proper printed circuit board layout and heat sinking design as well as attention to supply filtering transient suppression and I O signal quality The goods provided may not be complete in terms of re...

Page 4: ...P community is for sharing ideas and tips ask and answer technical questions and receive input on just about any embedded design topic The NXP community is at http community nxp com 3 Getting ready Wo...

Page 5: ...t JP3 1 2 3 4 5 6 I 2 C target address 0x50 JP4 1 2 3 4 Pull out jumpers if pull ups on I 2 C controller JP5 1 2 Pull out and insert current meter if SC18IS606 current is to be measured Table 1 Jumper...

Page 6: ...he SC18IS606 EVB evaluation board are available at http www nxp com SC18IS606 EVB 4 4 Sample control sequences from I 2 C controller 4 4 1 GPIO as input Write 0x50 0xF6 0x07 program chip select pins a...

Page 7: ...e 3 SPI clock to 1 875MHz Write 0xF1 clear interrupt Write 0x02 0x06 send command 0x06 write enable latch to EEPROM with SS1 as CS Write 0x02 0x02 0x00 0x00 0x30 0x01 0x03 0x05 0x07 0x09 0x0B write da...

Page 8: ...s third party customer s Customer is responsible for doing all necessary testing for the customer s applications and products using NXP Semiconductors products in order to avoid a default of the appli...

Page 9: ...b 2 JP1 SPI header 5 Tab 3 JP2 I2C 6 Tab 4 JP3 SC18IS606 I2C target address 6 Tab 5 Errata list 7 Figures Fig 1 Headers and jumpers 5 UM11666 All information provided in this document is subject to le...

Page 10: ...ces from I2C controller 6 4 4 1 GPIO as input 6 4 4 2 GPIO as output 6 4 4 3 SPI mode and clock configuration 7 4 4 4 Device ID read 7 4 4 5 On board EEPROM write and read 7 5 Errata list 7 6 Legal in...

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