NXP Semiconductors SAFE ASSURE Qorivva MPC5601P, Reference Manual

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Chapter 27 Functional Safety
MPC5602P Microcontroller Reference Manual, Rev. 4
750 Freescale Semiconductor
Figure 27-7. Change lock settings for 32-bit protected addresses
Figure 27-8 shows an example that has a mixed protection size configuration.
Figure 27-8. Change lock settings for mixed protection
The data written to SLBR n [SLB0] is mirrored to SLBR n [SLB1] as the corresponding register is 16-bit
protected. The data written to SLBR n [SLB2] is blocked as the corresponding register is unprotected. The
data written to SLBR n [SLB3] is written to SLBR n [SLB3].
27.2.6.2.2 Enable locking via mirror module space (area #3)
It is possible to enable locking for a register after writing to it. To do so the mirrored module address space
must be used.
Figure 27-9 shows one example.
Figure 27-9. Enable locking via mirror module space (area #3)
When writing to address 0x0008 the registers MR9 and MR8 in the protected module are updated. The
corresponding lock bits remain unchanged (left part of
Figure 27-6 ).
1
SLB0 SLB1 SLB2 SLB3
SLBR n [WE[3:0]]
SLBR[SLB[3:0]]
update lock bits
to SLB0
write data
to SLB1 to SLB2 to SLB3
X X X
SLB0 SLB1 0 SLB3
SLBR
update lock bits
1 SLBR n [WE[3:0]]
to SLB0
write data
to SLB1 to SLB2 to SLB3
X X 1
SLBR 2
WE[3:0]
0 0 0 0 0 0 0 0
SLB[3:0]
16-bit write to address 0x0008
no change
write to
MR[9:8]
SLBR 2
WE[3:0]
0 0 0 0 1 1 0 0
SLB[3:0]
16-bit write to address 0x2008
set lock bits
write to
MR[9:8]