NXP Semiconductors SAFE ASSURE Qorivva MPC5601P, Reference Manual

Page: 467 / 954

Chapter 20 Deserial Serial Peripheral Interface (DSPI)
MPC5602P Microcontroller Reference Manual, Rev. 4
Freescale Semiconductor 467
Table 20-19 shows an example of a computed baud rate.
20.8.4.2 CS to SCK delay (t
CSC
)
The CS_ x to SCK _x delay is the length of time from assertion of the CS _x signal to the first SCK _x edge.
Refer to Figure 20-16 for an illustration of the CS _x to SCK _x delay. The PCSSCK and CSSCK fields in
the DSPI x _CTAR n registers select the CS _x to SCK _x delay, and the relationship is expressed by the
following formula:
Eqn. 20-6
Table 20-20 shows an example of the computed CS to SCK _x delay.
20.8.4.3 After SCK delay (t
ASC
)
The after SCK _x delay is the length of time between the last edge of SCK _x and the deassertion of CS _x .
Refer to Figure 20-16 and Figure 20-17 for illustrations of the after SCK _x delay. The PASC and ASC
fields in the DSPI x _CTAR n registers select the after SCK delay. The relationship between these variables
is given in the following formula:
Eqn. 20-7
Table 20-21 shows an example of the computed after SCK delay.
Table 20-19. Baud rate computation example
f
SYS
PBR Prescaler value BR Scaler value DBR value Baud rate
100 MHz 0b00 2 0b0000 2 0 25 Mbit/s
20 MHz 0b00 2 0b0000 2 1 10 Mbit/s
Table 20-20. CS to SCK delay computation example
PCSSCK Prescaler value CSSCK Scaler value
f
SYS
CS to SCK delay
0b01 3 0b0100 32 100 MHz 0.96

s
Table 20-21. After SCK delay computation example
PASC Prescaler value ASC Scaler value
f
SYS
After SCK delay
0b01 3 0b0100 32 100 MHz 0.96

s
t
CSC
=
f
SYS
CSSCK

PCSSCK
1

t
ASC
=
f
SYS
ASC

PASC
1
