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FlexRay Communication Controller (FlexRAY)
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor
26-145
26.6.18.2 Protocol Status Registers
Protocol Status Register 2 (PSR2)
provides slot status information about the Network Idle Time NIT
and the Symbol Window. The
Protocol Status Register 3 (PSR3)
provides aggregated slot status
information.
26.6.18.3 Slot Status Registers
The eight slot status registers,
Slot Status Registers (SSR0–SSR7)
, can be used to observe the status of
static slots, dynamic slots, the symbol window, or the NIT without individual message buffers. These
registers provide all slot status related and received frame / symbol related status information, as given in
first valid
indicator for non-transmission slots.
26.6.18.4 Slot Status Counter Registers
The controller provides four slot status error counter registers,
. Each of these slot status counter registers is updated with the value of an internal slot
status counter at the start of a communication cycle. The internal slot status counter is incremented if its
increment condition, defined by the
Slot Status Counter Condition Register (SSCCR)
, matches the status
vector provided by the PE. All static slots, the symbol window, and the NIT status are taken into account.
Dynamic
slots are
excluded
. The internal slot status counting and update timing is shown in
Figure 26-149. Slot Status Counting and SSCRn Update
The PE provides the status of the NIT in the first slot of the next cycle. Due to these facts, the SSCR
n
register reflects, in cycle n, the status of the NIT of cycle
n
– 2, and the status of all static slots and the
symbol window of cycle
n
– 1.
cycle s
tart
sl
ot start
slot s
tart
sy
m
bol window s
tart
MT
st
at
us(NIT)
MT
st
at
us(slot
1)
st
at
us(slot
k)
MT
st
at
us(slot
n)
MT
NI
T star
t
st
at
us(sym.
win)
MT
cycle st
art
st
at
us(NIT)
communication cycle
static segment
dynamic segment
symbol window
NIT
slot 1
MT
incr. SSCRn_INT on error
incr. SSCRn_INT on error
SSCRn:= SSCRn_INT
SSCRn_INT not updated
SSCRn:= SSCRn_INT
Summary of Contents for PXN2020
Page 1: ...PXN20 Microcontroller Reference Manual Devices Supported PXN2020 PXN2120 PXN20RM Rev 1 06 2011...
Page 42: ...PXN20 Microcontroller Reference Manual Rev 1 lxiv Freescale Semiconductor...
Page 64: ...Introduction PXN20 Microcontroller Reference Manual Rev 1 1 22 Freescale Semiconductor...
Page 112: ...Signal Description PXN20 Microcontroller Reference Manual Rev 1 3 44 Freescale Semiconductor...
Page 118: ...Resets PXN20 Microcontroller Reference Manual Rev 1 4 6 Freescale Semiconductor...
Page 372: ...e200z6 Core Z6 PXN20 Microcontroller Reference Manual Rev 1 13 8 Freescale Semiconductor...
Page 412: ...e200z0 Core Z0 PXN20 Microcontroller Reference Manual Rev 1 14 14 Freescale Semiconductor...
Page 821: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 Freescale Semiconductor 27 49...
Page 822: ...Media Local Bus MLB PXN20 Microcontroller Reference Manual Rev 1 27 50 Freescale Semiconductor...
Page 1376: ...Memory Map PXN20 Microcontroller Reference Manual Rev 1 A 118 Freescale Semiconductor...