NXP Semiconductors PXN2020, Reference Manual, Page: 331 / 1376

Flash Memory Array and Control
PXN20 Microcontroller Reference Manual, Rev. 1
Freescale Semiconductor 12-5
0x0008_0000 High-address space H0 5
0x000C_0000 H1
0x0010_0000 H2 6
0x0014_0000 H3
0x0018_0000 H4 7
0x001C_0000 H5
0x0020_0000–0x00FF_BFFF Reserved
0x00FF_C000–0x00FF_FDD7 General use S All
2
0x00FF_FDD8 Serial passcode (0xFEED_FACE_CAFE_BEEF)
0x00FF_FDE0 Censorship control word (0x55AA_55AA)
0x00FF_FDE4 General use
0x00FF_FDE8 LML reset configuration (0x0010_0000)
0x00FF_FDEC General use
0x00FF_FDF0 HBL reset configuration (0x0FFF_FFFF)
0x00FF_FDF4 General use
0x00FF_FDF8 SLL reset configuration (0x000F_FFFF)
0x00FF_FDFC–0x00FF_FFFF General use
1
Ln = Low Address Space, Mn = Mid Address Space, Hn = High Address Space, S = Shadow Block.
2
For read while write operations, the shadow row behaves as if it is in all partitions.
Table 12-2. Flash Configuration Register Memory Map
Offset from
FLASH_REGS_BASE
(0xFFFF_8000)
Register Access Reset Value Section/Page
0x0000 MCR—Module configuration register R/W
1
0x0540_0600 12.3.2.1/12-6
0x0004 LML—Low-/Mid-address space block locking register R/W
1
0x0013_03FF 12.3.2.2/12-10
0x0008 HBL—High-address space block locking register R/W
1
0x0000_003F 12.3.2.3/12-12
0x000C SLL—Secondary low-/mid-address space block locking
register R/W
1
0x0013_03FF 12.3.2.4/12-13
0x0010 LMS—Low-/mid-address space block select register R/W
1
0x0000_0000 12.3.2.5/12-14
0x0014 HBS—High-address space block select register R/W
1
0x0000_0000 12.3.2.6/12-15
0x0018 ADR—Address register R/W
1
0x0000_0000 12.3.2.7/12-16
0x001C PFCRP0—Platform flash configuration register for port 0 R/W
1
0x0800_FF00 12.3.2.8/12-17
0x0020 PFCRP1—Platform flash configuration register for port 1 R/W
1
0x3000_FF00 12.3.2.8/12-17
0x0024 PFAPR—Platform flash access protection register R/W 0x00FF_FE00 12.3.2.9/12-20
Table 12-1. Flash Memory Map (continued)
Offset from FLASH_BASE
(0x0000_0000)
Use Block
1
Partition