Board Interface Connector
MPC5777C EVB User Guide, Rev. 1
38
NXP Semiconductors
Figure 27:
EBI-SRAM Interface
5.9
Zipwire Interface
The MCU features a bus for communicating between two devices over a high speed (240 MHz) serial
interface called Zipwire. It is implemented using a Serial Inter-Processor Interface (SIPI) over an LVDS
Fast synchronous Serial Transmission Interface (LFAST). The SIPI module controls the higher level
protocol of the interface, and the LFAST controls the physical interface.
This interface consists of five signals:
•
a pair of LVDS transmits pins,
•
a pair of receive LVDS pins and
•
a clock. The clock is unidirectional and is defined to be an output on the Slave and an input on the
Master node.
The daughter card SIPI connector (J14) interface signal diagram is shown in
