NXP Semiconductors MPC5644A, Reference Manual, Page: 946 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
946 Freescale Semiconductor
24.5.9.3 Channel control and configuration microoperations
Channel Control and Configuration fields set configuration values in the channel logic of the channel
selected by the CHAN register, except fields LSR and CIRC.
24.5.9.3.1 Channel flags operations
Each channel has two associated hardware flags, called Channel Flag 0 and Channel Flag 1. Microcode
field FLC (3 bits) allows them to be set or cleared, as shown in
Table 24-97 . These flags can be tested by
microcode as a branch condition, and may also influence in the Entry Point taken, allowing fast state
decoding. For more details, see
Section 24.5.1.1, Entry points .
24.5.9.3.2 Comparator and time base selection
TBSA and TBSB fields (4-bit wide each) are used to configure the type of the comparator and the time
bases used for match or capture (See
Table 24-98 and Table 24-99 ). TBSA can also be used to control the
Output Buffer Enable signal (See Table 24-46 ).
Table 24-97. P Flags Operation – FLC
FLC Meaning
000 clear flag0
001 set flag0
010 clear flag1
011 set flag1
100 copy flag1:flag0 from P[25:24]
101 copy flag1:flag0 from P[27:26]
110 copy flag1:flag0 from P[29:28]
111 no operation (nil)
Table 24-98. Time Base Selection 1 – TBSA
TBSA bit 2 1 0
TBSA[3] = 0
Bitfield Comparator selection Capture selection Match TB selection
0 greater or equal TCR1 TCR1
1 equal-only TCR2 TCR2
TBSA[3] = 1
action
2 1 0
set OBE = 1 0 0 0
set OBE = 0 0 0 1
do nothing 1 1 1
reserved all other values