NXP Semiconductors MPC5644A, Reference Manual, Page: 665 / 1735

Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 665
Figure 22-16 and Figure 22-17 show how the channel can be used to perform a single output compare with
EDPOL value being transferred to the output flip-flop and toggling the output flip-flop at each match,
respectively. Note that once in SAOC mode the matches are enabled thus the desired match value on
register A1 must be written before the mode is entered. A1 register can be updated at any time thus
modifying the match value which will reflect in the output signal generated by the channel. Subsequent
matches are enabled with no need of further writes to EMIOS_CADR[n]. The FLAG is set at the same
time a match occurs (see
Figure 22-18 ).
NOTE
The channel internal counter in SAOC mode is free-running. It starts
counting as soon as the SAOC mode is entered.
Figure 22-16. SAOC example with EDPOL value being transferred to the output flip-flop
Figure 22-17. SAOC example toggling the output flip-flop
selected counter bus 0x000500 0x001000 0x001100 0x001000 0x001100 0x001000
output flip-flop
Update to A1
A1 value
1
0xxxxxxx 0x001000
FLAG pin/register
0x001000 0x001000 0x001000
A1 match
A1 match A1 match
Notes: 1. CADR[n] = A2
EDSEL = 0
EDPOL = 1
A2 = A1 according to OU[n] bit
selected counter bus 0x000500 0x001000 0x001100 0x001000 0x001100 0x001000
A1 value
1
0xxxxxxx 0x001000
output flip-flop
Update to A1
FLAG pin/register
A1 match
A1 match A1 match
0x001000 0x001000
0x001000
Notes: 1. CADR[n] = A2
EDSEL = 1
EDPOL = x
A2 = A1 according to OU[n] bit