NXP Semiconductors MPC5644A, Reference Manual, Page: 333 / 1735

External Bus Interface (EBI)
MPC5644A Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 333
14.6 Initialization/Application information
14.6.1 Booting from external memory
The EBI block does not support booting directly to external memory (i.e. fetching the first instruction after
reset externally). One common method for an MCU to resemble an external boot with this EBI is to use
an internal Boot Assist Module on the MCU, which fetches the first instruction internally and configures
EBI registers before branching to an external address to “boot” externally. Refer to the device-specific
documentation to see how/if external boot is supported for a particular MCU.
If code in external memory needs to write EBI registers, this must be done in a way that avoids modifying
EBI registers while external accesses are being performed, such as the following method:
• Copy the code that is doing the register writes (plus a return branch) to internal SRAM
• Branch to internal SRAM to run this code, ending with a branch back to external flash
14.6.2 Running with SDR (Single Data Rate) burst memories
This includes FLASH and SRAM memories with a compatible burst interface. BDIP is required only for
some SDR memories.
Figure 14-38 shows a block diagram of an MCU connected to a 32-bit SDR burst
memory.
Figure 14-38. MCU Connected to SDR Burst Memory
Refer to Figure 14-23 for an example of the timing of a typical Burst Read operation to an SDR burst
memory. Refer to Figure 14-14 for an example of the timing of a typical Single Write operation to SDR
memory.
CLKOUT
CK
ADDR[3:29]
A[0:21]
CE CS0
DATA[0:31] D[0:31]
TS
BDIP
WE0/BE0
ADV
BAA*
WE**
OE
OE
MCU
* May or may not be connected, depending on the memory used.
SDR Burstable
Flash or SRAM
** Flash memories typically use one WE signal as shown, RAMs use 2 or 4 (16-bit or 32-bit)