NXP Semiconductors MPC5644A, Reference Manual, Page: 214 / 1735

General-Purpose Static RAM (SRAM)
MPC5644A Microcontroller Reference Manual, Rev. 6
214 Freescale Semiconductor
11.5 External signal description
The external signal for SRAM is the V
STBY
RAM power supply. If the standby feature of the SRAM is
not used, tie the V
STBY
pin to V
SS
.
11.6 Register memory map
The SRAM occupies 192 KB of memory starting at the base address as shown in Table 11-1 .
The internal SRAM has no registers. Registers for the SRAM ECC are located in the ECSM. See
Chapter 18, Error Correction Status Module (ECSM) .
NOTE
The ECSM module contains the register MUDCR that enables SRAM to be
configured with an additional wait state. This is required when the CPU is
configured to operate at its maximum frequency. See
Section 18.4.3,
Miscellaneous User-Defined Control Register (ECSM_MUDCR) , for
details.
11.7 Functional description
ECC checks are performed during the read portion of an SRAM ECC read/write (R/W) operation, and
ECC calculations are performed during the write portion of a read/write (R/W) operation. Because the
ECC bits can contain random data after the device is powered on, you must initialize the SRAM by
executing 32-bit write instructions to the entire SRAM. For more information, see
Section 11.9,
Initialization and application information .
For software compatibility with other members of the MPC5500 and MPC5600 families, 64-bit writes can
be used to initialize the ECC. This initializes the ECC bits of two 32-bit words at a time.
11.8 SRAm ecc mechanism
The SRAM ECC detects the following conditions and produces the following results:
• Detects and corrects all 1-bit errors
• Detects and flags all 2-bit errors as non-correctable errors
SRAM does not detect all errors greater than 2 bits. Internal SRAM writes are done on byte boundaries:
• 1 byte (0:7 bits)
• 2 bytes (0:15 bits)
• 4 bytes or 1 word (0:31 bits)
Table 11-1. SRAM memory map
Address Register Name Register Description Size
Base (0x4000_0000) — SRAM powered by V
STBY
32 KB
Base + 0x8000 — 160-KB RAM 160 KB