
Development Trigger Semaphore (DTS)
MPC5644A Microcontroller Reference Manual, Rev. 6
1694
Freescale Semiconductor
The DTS Trigger Output (DTO) signal is connected to one of the EVTO inputs of the Nexus Port
Controller (NPC). The other EVTO inputs to the NPC are connected to the other Nexus modules in the
device. DTO is asserted when any bit in the DTS_SEMAPHORE register is set.
NOTE
When the DTS module is enabled (DTS_ENABLE[DTS_EN] = 0b1), the
Nexus EVTO function of the EVTO pin is disabled and EVTO becomes the
DTO. Unlike the EVTO function that only asserts for one clock, the DTO
function remains asserted until the tool reads the DTS_SEMAPHORE
register, clearing the register’s contents.
shows the chain of events that begins with setting of any bit in the DTS_SEMAPHORE
register and the clearing of the register caused by a Nexus read.
Figure 38-2. DTO event sequence
38.3
DTS device connections
The DTS module connects to the Peripheral Bridge (PBRIDGE) for access to the registers. The PBRIDGE
is connected to a slave port of the Crossbar bus interface (XBAR). Connected to the XBAR master ports
are the core (e200z4, with one master port for the Instruction and another for the Load/Store bus), the
eDMA module, the FlexRay module, and an External Bus interface
1
.
The registers have limited access as described in
Section 38.3.1, DTS register access
. Access is based on
the XBAR Master ID of the accessing module. Access to the DTS_SEMAPHORE register is limited to the
e200z4 core and the eDMA module and is restricted to only setting bits. Only an access via a Nexus
Read/Write Access from an external tool through the Nexus/JTAG port of the device can clear bits in the
1. The External Bus Interface XBAR master port is used for internal test of the device and is not accessible to the user.
DTS Trigger Output (DTO)
EVTO pin
DTS_SEMAPHORE register
CPU writes
DTS_SEMAPHORE
to a non-zero value
Internal DTO signal
is asserted
EVTO asserted
externally
Initial conditions:
– DTS_ENABLE[DTS_EN] = 0b1
– DTS_SEMAPHORE = 0x0000_0000
Nexus RWA reads
DTS_SEMAPHORE,
which clears register
Internal DTO
signal is negated
EVTO negated
externally
~
~
~
~
~
~
Summary of Contents for MPC5644A
Page 2: ...MPC5644A Microcontroller Reference Manual Rev 6 2 Freescale Semiconductor...
Page 24: ...MPC5644A Microcontroller Reference Manual Rev 6 24 Freescale Semiconductor...
Page 26: ...MPC5644A Microcontroller Reference Manual Rev 6 26 Freescale Semiconductor...
Page 52: ...Introduction MPC5644A Microcontroller Reference Manual Rev 6 52 Freescale Semiconductor...
Page 56: ...Memory Map MPC5644A Microcontroller Reference Manual Rev 6 56 Freescale Semiconductor...
Page 1228: ...Decimation Filter MPC5644A Microcontroller Reference Manual Rev 6 1228 Freescale Semiconductor...
Page 1440: ...FlexCAN Module MPC5644A Microcontroller Reference Manual Rev 6 1440 Freescale Semiconductor...