NXP Semiconductors MPC5644A, Reference Manual, Page: 1000 / 1735

Enhanced Time Processing Unit (eTPU2)
MPC5644A Microcontroller Reference Manual, Rev. 6
1000 Freescale Semiconductor
ETPU_MCR is written to 1) eTPU itself will start this procedure
1
reading the SCM whenever allowed by
microengine. At the end of the cycle, when all the array has been read and the SCM signature is calculated,
the Host CPU can be notified via Global Exception if the MISC Accumulator does not match the value in
ETPU_MISCCMPR.
Equation 24-1 shows how the average time taken by MISC to complete the signature of the whole SCM
can be calculated.
Average MISC period = S / (4 * f * (1 - L)) Eqn. 24-1
In Equation 24-1 ,
f = clock frequency
S = SCM size in bytes
L = eTPU load (as a percentage of execution clocks over a period of time, including TST clocks)
Further detail on MISC calculation can be found on Section 24.5.10.3.1, SCM Test – Multiple input
signature calculator . The application note AN2192 - Detecting Errors in the Dual Port RAM
(DPTRAM) Module is also a good source of information (although it refers to TPU) on MISC signature.
1. eTPU MISC hardware is optimized to read 32-bit words from memory and to calculate this CRC in parallel, rather than shifting
one bit at a time. The actual implementation inside eTPU, although bringing to the same results, does not match exactly the
algorithm shown here.