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Universal Serial Bus Interface
MCF5253 Reference Manual, Rev. 1
Freescale Semiconductor
24-141
24.11.4 Managing Queue Heads
The device queue head (dQH) points to the linked list of transfer tasks, each depicted by the device
Transfer Descriptor (dTD). An area of memory pointed to by ENDPOINTLISTADDR contains a group of
all dQH's in a sequential list as shown in
. The even elements in the list of dQH's are used for
receive endpoints (OUT/SETUP) and the odd elements are used for transmit endpoints (IN/INTERRUPT).
Device transfer descriptors are linked head to tail starting at the queue head and ending at a terminate bit.
Once the dTD has been retired, it will no longer be part of the linked list from the queue head. Therefore,
the software is required to track all transfer descriptors since pointers will no longer exist within the queue
head once the dTD is retired (see
Section 24.11.5.1, “Software Link Pointers
”
).
In addition to the current and next pointers and the dTD overlay examined in
Operational Model For Packet Transfers
”
, the dQH also contains the following parameters for the
associated endpoint: Multipler, Maximum Packet Length, Interrupt On Setup. The complete initialization
of the dQH including these fields is demonstrated in the next section.
Ping
Ignore
Ignore
Ignore
Ignore
Ignore
Invalid
Ignore
Ignore
Ignore
Ignore
Ignore
1
Zero Length Packet
2
Force Bit Stuff Error
Table 24-87. Isochronous Endpoint Bus Response Matrix (continued)
Stall
Not Primed
Primed
Underflow
Overflow
Summary of Contents for MCF5253
Page 1: ...Document Number MCF5253RM Rev 1 08 2008 MCF5253 Reference Manual...
Page 26: ...MCF5253 Reference Manual Rev 1 xxvi Freescale Semiconductor...
Page 32: ...MCF5253 Reference Manual Rev 1 xxxii Freescale Semiconductor...
Page 46: ...MCF5253 Introduction MCF5253 Reference Manual Rev 1 1 14 Freescale Semiconductor...
Page 62: ...Signal Description MCF5253 Reference Manual Rev 1 2 16 Freescale Semiconductor...
Page 98: ...Instruction Cache MCF5253 Reference Manual Rev 1 5 10 Freescale Semiconductor...
Page 104: ...Static RAM SRAM MCF5253 Reference Manual Rev 1 6 6 Freescale Semiconductor...
Page 128: ...Synchronous DRAM Controller Module MCF5253 Reference Manual Rev 1 7 24 Freescale Semiconductor...
Page 144: ...Bus Operation MCF5253 Reference Manual Rev 1 8 16 Freescale Semiconductor...
Page 176: ...System Integration Module SIM MCF5253 Reference Manual Rev 1 9 32 Freescale Semiconductor...
Page 198: ...Analog to Digital Converter ADC MCF5253 Reference Manual Rev 1 12 6 Freescale Semiconductor...
Page 246: ...DMA Controller MCF5253 Reference Manual Rev 1 14 18 Freescale Semiconductor...
Page 282: ...UART Modules MCF5253 Reference Manual Rev 1 15 36 Freescale Semiconductor...
Page 344: ...Audio Interface Module AIM MCF5253 Reference Manual Rev 1 17 46 Freescale Semiconductor...
Page 362: ...I2 C Modules MCF5253 Reference Manual Rev 1 18 18 Freescale Semiconductor...
Page 370: ...Boot ROM MCF5253 Reference Manual Rev 1 19 8 Freescale Semiconductor...