UM10429
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User manual
Rev. 1 — 20 October 2010
33 of 258
NXP Semiconductors
UM10429
Chapter 3: LPC1102 System configuration
4. If an external pin is used for wake-up, enable and clear the wake-up pin in the start
logic registers (
to
), and enable the start logic interrupt in the NVIC.
5. In the SYSAHBCLKCTRL register (
), disable all peripherals except
counter/timer or WDT if needed.
6. Write one to the SLEEPDEEP bit in the ARM Cortex-M0 SCR register (
).
7. Use the ARM WFI instruction.
3.8.3.3 Wake-up from Deep-sleep mode
The microcontroller can wake up from Deep-sleep mode in the following ways:
•
Signal on an external pin. For this purpose, pins PIO0_0, PIO0_8 to PIO0_11, and
PIO1_0 can be enabled as inputs to the start logic. The start logic does not require
any clocks and generates the interrupt if enabled in the NVIC to wake up from
Deep-sleep mode.
•
Input signal to the start logic created by a match event on one of the general purpose
timer external match outputs. The pin holding the timer match function must be
enabled as start logic input in the NVIC, the corresponding timer must be enabled in
the SYSAHBCLKCTRL register, and the watchdog oscillator must be running in
Deep-sleep mode (for details see
•
Reset from the BOD circuit. In this case, the BOD circuit must be enabled in the
PDSLEEPCFG register, and the BOD reset must be enabled in the BODCTRL
register (
•
Reset from the watchdog timer. In this case, the watchdog oscillator must be running
in Deep-sleep mode (see PDSLEEPCFG register), and the WDT must be enabled in
the SYSAHBCLKCTRL register.
•
A reset signal from the external RESET pin.
Remark:
If the watchdog oscillator is running in Deep-sleep mode, its frequency
determines the wake-up time causing the wake-up time to be longer than waking up with
the IRC.
3.9 Deep-sleep mode details
3.9.1 IRC oscillator
The IRC is the only oscillator on the LPC1102 that can always shut down glitch-free.
Therefore it is recommended that the user switches the clock source to IRC before the
chip enters Deep-sleep mode.
3.9.2 Start logic
The Deep-sleep mode is exited when the start logic indicates an interrupt to the ARM
core. The port pins PIO0_0 to PIO0_11 and PIO1_1 are connected to the start logic and
serve as wake-up pins. The user must program the start logic registers for each input to
set the appropriate edge polarity for the corresponding wake-up event. Furthermore, the
interrupts corresponding to each input must be enabled in the NVIC (see
).
