NXP Semiconductors K32W, Reference Manual

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SECURITY STATUS
NXP Semiconductors
JN-RM-2080
K32W module development reference manual
JN-RM-2080 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2020. All rights reserved.
Reference manual Rev. 1.0
— 27 Mar 2020
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12. List of figures
Fig 1. K32W061-001-M10 & M13 block diagrams....... 5
Fig 2. K32W061-001-M16 block diagram .................... 5
Fig 3. K32W061-001-M10 & M13................................ 6
Fig 4. K32W061-001-M16 ........................................... 6
Fig 5. Critical Layout of die flag area ........................... 7
Fig 6. PCB stack-up .................................................... 8
Fig 7. RF Matching Network ..................................... 11
Fig 8. RF Plots for 3pF ceramic capacitor Murata
GRM1555 type ................................................ 12
Fig 9. GND path between C10/C12 and C19 ............ 13
Fig 10. GND vias placement ....................................... 15
Fig 11. Decoupling capacitors placement ................... 15
Fig 12. VDD(Radio) decoupling .................................. 16
Fig 13. FB and VDD_PMU decoupling ........................ 16
Fig 14. VDDE decoupling ............................................ 16
Fig 15. VBAT decoupling ............................................ 17
Fig 16. PCB placement of a K32W061 module with a
printed antenna ............................................... 18
Fig 17. Recommended PCB decal for HVQFN40 40-pin
QFN ................................................................ 19
Fig 18. Extra test pin ................................................... 19
Fig 19. Solder paste mask for HVQFN40 40-pin QFN 20
Fig 20. Vias on the paddle of the HVQFN40 40-pin QFN
........................................................................ 20