NXP Semiconductors K32 L2A Series, Reference Manual, Page: 879 / 1379

MSCM memory map (continued)
Absolute
address
(hex)
Register name
Width
(in bits)
Access Reset value
Section/
page
4000_102C Processor 0 Count Register (MSCM_CP0COUNT) 32 R See section
34.4.10/
886
4000_1030 Processor 0 Configuration Register (MSCM_CP0CFG0) 32 R 0000_0000h
34.4.11/
886
4000_1034 Processor 0 Configuration Register (MSCM_CP0CFG1) 32 R 0000_0000h
34.4.11/
886
4000_1038 Processor 0 Configuration Register (MSCM_CP0CFG2) 32 R 0000_0000h
34.4.11/
886
4000_103C Processor 0 Configuration Register (MSCM_CP0CFG3) 32 R 0000_0000h
34.4.11/
886
4000_1400 On-Chip Memory Descriptor Register (MSCM_OCMDR0) 32 R/W See section
34.4.12/
887
4000_1404 On-Chip Memory Descriptor Register (MSCM_OCMDR1) 32 R/W See section
34.4.12/
887
4000_1408 On-Chip Memory Descriptor Register (MSCM_OCMDR2) 32 R/W See section
34.4.12/
887
34.4.2 Processor X Type Register (MSCM_CPxTYPE)
The register provides a CPU-specific response indicating the personality of the core
making the access. The 32-bit response includes 3 ASCII characters that define the CPU
type, along with a byte that defines the logical revision number. The logical revision
number follows Arm’s rYpZ nomenclature.
Address: 4000_1000h base + 0h offset = 4000_1000h
Bit 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
PERSONALITY RYPZ
W
Reset
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* Notes:
PERSONALITY field: See bit field description •
RYPZ field: See bit field description •
MSCM_CPxTYPE field descriptions
Field Description
31–8
PERSONALITY
Processor x Personality
This read-only field defines the processor personality for CPx
Table continues on the next page...
Chapter 34 Miscellaneous System Control Module (MSCM)
K32 L2A Reference Manual, Rev. 2, 01/2020
NXP Semiconductors 879