NXP Semiconductors K32 L2A Series, Reference Manual, Page: 420 / 1379

Bit 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R
0
EMLM
CLM
HALT
HOE
Reserved
ERCA EDBG
Reserved
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
* Notes:
x = Undefined at reset. •
DMAx_CR field descriptions
Field Description
31
ACTIVE
DMA Active Status
0 eDMA is idle.
1 eDMA is executing a channel.
30–24
Reserved
This field is reserved.
Reserved
23–18
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
17
CX
Cancel Transfer
0 Normal operation
1 Cancel the remaining data transfer. Stop the executing channel and force the minor loop to finish. The
cancel takes effect after the last write of the current read/write sequence. The CX bit clears itself after
the cancel has been honored. This cancel retires the channel normally as if the minor loop was
completed.
16
ECX
Error Cancel Transfer
0 Normal operation
1 Cancel the remaining data transfer in the same fashion as the CX bit. Stop the executing channel and
force the minor loop to finish. The cancel takes effect after the last write of the current read/write
sequence. The ECX bit clears itself after the cancel is honored. In addition to cancelling the transfer,
ECX treats the cancel as an error condition, thus updating the Error Status register (DMAx_ES) and
generating an optional error interrupt.
15–8
Reserved
This field is reserved.
This read-only field is reserved and always has the value 0.
7
EMLM
Enable Minor Loop Mapping
0 Disabled. TCDn.word2 is defined as a 32-bit NBYTES field.
1 Enabled. TCDn.word2 is redefined to include individual enable fields, an offset field, and the NBYTES
field. The individual enable fields allow the minor loop offset to be applied to the source address, the
destination address, or both. The NBYTES field is reduced when either offset is enabled.
6
CLM
Continuous Link Mode
Table continues on the next page...
Memory map/register definition
K32 L2A Reference Manual, Rev. 2, 01/2020
420 NXP Semiconductors