NXP Semiconductors freescale TWR-MCF51JG, User Manual, Page: 7 / 21

TWRMCF51JGUM TWR-MCF51JG Tower Module User's Manual Page 7 of 21
2 Hardware Description
The TWR-MCF51JG is a Tower Controller Module featuring the MCF51JG256—a C based
microcontroller with USB 2.0 full-speed OTG controllers in a 44 MAPLGA package. It is intended for use
in the Freescale Tower System but can operate stand-alone. An on-board debug circuit, OSBDM,
provides a BDM interface and a power supply input through a single USB mini B connector. Figure 3
shows a block diagram of the TWR-MCF51JG. The following sections describe the hardware in more
detail.
Figure 3. TWR-MCF51JG Block Diagram
2.1 MCF51JG Microcontroller
The TWR-MCF51JG module features the MCF51JG256CFT. The key features of the microcontroller are:

32-bit C core with FlexMemory, EMAC, and DIV hardware acceleration

50 MHz maximum core operating frequency

44-pin MAPLGA, 5mm x 5mm

1.85V – 3.6V operating voltage input range

256 Kbytes of program flash, 64 Kbytes of static RAM

FlexMemory consisting of 32 Kbytes of FlexMemory that can be used as additional non-volatile
flash or up to 2KB of enhanced EEPROM.

10 flexible low power modes, ideal for extending battery life

Cryptographic Acceleration Unit (CAU) and Random Number Generator (RNGA) for secure
communications