NXP Semiconductors freescale semiconductor ColdFire MCF51CN128 Series, Reference Manual

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Modes of Operation
MCF51CN128 Reference Manual, Rev. 6
Freescale Semiconductor 3-5
Figure 3-3. All Allowable Power Mode Transitions for MCF51CN128
Table 3-3 defines triggers for the various state transitions shown in Figure 3-2 .
Table 3-3. Triggers for Transitions Shown in Figure 3-2
Transition # From To Trigger
1
Run LPrun
Configure settings shown in Table 3-2 , switch
LPR=1 last
LPrun Run
Clear SPMSC2[LPR]
Interrupt when SPMSC2[LPWUI]=1
Negative transition on enabled BKGD/MS pin.
2
Run Stop2
Pre-configure settings shown in Table 3-2 , execute
STOP instruction
Stop2 Run
Assert RESET/PTC3
1
low or RTC timeout. Reload
environment from RAM
3
LPrun LPwait
Pre-configure settings shown in Table 3-2 , execute
STOP instruction
LPwait LPrun Interrupt when SPMSC2[LPWUI]=0
4
LPrun Stop3 Execute STOP instruction
Stop3 LPrun Interrupt when SPMSC2[LPWUI]=0
5
LPwait Run Interrupt when SPMSC2[LPWUI]=1
Run LPwait Not supported.
6
Run Wait
Pre-configure settings shown in Table 3-2 , execute
STOP instruction
Wait Run Interrupt
7
Run Stop4
Pre-configure settings shown in Table 3-2 , execute
STOP instruction
Stop4 Run Interrupt
Stop3
1
Stop2
LPwait
Stop4
Wait
Run LPrun
4 8
7
6
2
5 3
Halt
9
11
10