Fast Ethernet Controller (FEC)
16-28
Freescale Semiconductor
MCF51CN128 Reference Manual, Rev. 6
16.5.4
Microcontroller Initialization
In the FEC, the descriptor control RISC initializes some registers after ECR[ETHER_EN] is asserted.
After the microcontroller initialization sequence is complete, hardware is ready for operation.
shows microcontroller initialization operations.
16.5.5
User Initialization (After Setting ECR[ETHER_EN])
After setting ECR[ETHER_EN], you can set up the buffer/frame descriptors and write to TDAR and
RDAR. Refer to
Section 16.5.1, “Buffer Descriptors,”
for more details.
16.5.6
Network Interface Options
The FEC supports an MII interface for 10/100 Mbps Ethernet and a 7-wire serial interface for 10 Mbps
Ethernet. The RCR[MII_MODE] bit select the interface mode. In MII mode (RCR[MII_MODE] set),
there are 18 signals defined by the IEEE 802.3 standard and supported by the EMAC.
shows
these signals.
Table 16-30. FEC User Initialization (Before ECR[ETHER_EN])
Description
Initialize FRSR (optional)
Initialize EMRBR
Initialize ERDSR
Initialize ETDSR
Initialize (Empty) Transmit Descriptor ring
Initialize (Empty) Receive Descriptor ring
Table 16-31. Microcontroller Initialization
Description
Initialize BackOff Random Number Seed
Activate Receiver
Activate Transmitter
Clear Transmit FIFO
Clear Receive FIFO
Initialize Transmit Ring Pointer
Initialize Receive Ring Pointer
Initialize FIFO Count Registers
