NXP Semiconductors FRDMKW36UG, User Manual, Page: 15 / 28

Figure 17. Jumper settings for Buck mode (auto start)
Table 1 describes the DCDC mode jumper configurations.
Table 1. DCDC configurations
DCDC operating mode
PSW_CFG
J38 REG_CFG
J27 REG_CFG
J30
Bypass mode 1-2 ON ON
Buck mode (manual start) 1-2 OFF OFF
Buck mode (auto start) 2-3 OFF OFF
By default, the FRDM-KW36 is configured in Buck mode (auto start). When device is in Buck mode, the VDD pins are supplied
by VDD_1P8OUT pin. This pin is configured to 1.8 V by default, if higher voltage domain is desired, the DCDC software driver
can be configured to provide different voltages on its outputs. Please, refer to Connectivity Framework Reference Manual which
is part of the FRDM-KW36 SDK documentation for details about DCDC software driver. For more details about the DCDC module
operation, refer to
AN5025 .
3.4 Serial flash memory
Component U3 is the AT45DB041E 4-Mbit (512 KB) serial flash memory with SPI interface. It is intended for Over-the-Air
Programming (OTAP) or for storing non-volatile system data, or parameters.
Figure 18 shows the memory circuit:
• Memory power supply is P1V8_3V3_BRD.
• Discrete pull-up resistors pads for SPI port.
• You can share the SPI with other peripherals using the J1 I/O header.
• The SPI Write Protect and Reset have a discrete pull-up resistor.
NXP Semiconductors
Functional description
FRDM-KW36 Freedom Development Board User’s Guide, Rev. 4, 01/2020
User's Guide 15 / 28