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NXP Semiconductors
UM11826
FRDMDUALK3664EVB evaluation board
6.2.1.2 Block diagram
aaa-047527
MC33664
ISOLATED
HIGH-SPEED
TRANSCEIVER
TPL1
CONNECTOR
J1
TPL1TXDATA
TPL1EN
VCC VIO
TPL1TXCSB
TPL1TXSCLK
LOGIC
CSB2
VIO
CSB1
CSB0
TPL2TXCSB
TPL1TXCSB
VIO
VCC
TPL1INTB
GUITXD
GUIRXD
TPL1RXCSB
TPL1RXSCLK
TPL1RXDATA
MC33664
ISOLATED
HIGH-SPEED
TRANSCEIVER
MCU
INTERFACE
K1 to K6
UART
CONNECTOR
J6
TPL2
CONNECTOR
J2
TPL2TXDATA
TPL2EN
VCC VIO TPL2TXCSB
TPL2TXSCLK
TPL2INTB
TPL2RXCSB
TPL2RXSCLK
TPL2RXDATA
TRANSFORMER
ISOLATION
isolation
isolation
TRANSFORMER
ISOLATION
Figure 3. Block diagram
6.2.1.3 Features
•
2.0 Mbit/s isolated network communication rate
•
Dual SPI architecture for message confirmation
•
Robust conducted and radiated immunity with wake-up
•
3.3 V and 5.0 V compatible logic thresholds
•
Low Sleep mode current with automatic bus wake-up
•
Ultra-low radiated emissions
•
Option to access UART of S32K344 via J6
6.2.1.4 Modes of operation
The modes of operation followed by MC33664 for the VIO and EN pins are shown in
.
UM11826
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User manual
Rev. 1 — 6 September 2022
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