manualshive.com logo in svg

NXP Semiconductors FRDMDUALK3664EVB, User Manual, Page: 10 / 17

Share
Download
NXP Semiconductors FRDMDUALK3664EVB User Manual Download Page 10

NXP Semiconductors

UM11826

FRDMDUALK3664EVB evaluation board

MCU interface

Signal

Description

Direction

MCU signal

K3-3

VIO

5.0 V IO supply

←

5V

K3-9

VCC5

5.0 V supply

←

5V

K3-11

GND

ground

GND

K3-13

GND

ground

GND

K5-12

GND

ground

GND

K2-13

GND

ground

GND

K6-12

GND

ground

GND

K4-2

TPL1EN

TPL1 enable

←

PTC19

K4-1

TPL1INTB

TPL1 interrupt

→

PTD1/EIRQ9

K4-4

TPL2EN

TPL2 enable

←

PTC18

K4-3

TPL2INTB

TPL2 interrupt

→

PTD0/EIRQ8

K2-17

TPL1TXCSB

TPL1 TX chip select

←

PTC6/LPSPI0_PCS1

K4-15

TPL2TXCSB

TPL2 TX chip select

←

PTE6/LPSPI0_PCS2

K2-19

TPL12TXCSB

TPL1 and TPL2 TX chip select

←

PTC7/LPSPI0_PCS0

K4-7

TPL12TXCLK

TPL1 and TPL2 TX clock

←

PTE1/LPSPI0_SCK

K4-13

TPL12TXDATA

TPL1 and TPL2 TX data

←

PTE2/LPSPI0_SOUT

K2-5

TPL1RXCSB

TPL1 RX chip select

→

PTB17/LPSPI1_PCS3

K2-11

TPL1RXCLK

TPL1 RX clock

→

PTB14/LPSPI1_SCK

K2-9

TPL1RXDATA

TPL1 RX data

→

PTB15/LPSPI1_SIN

K4-10

TPL2RXCSB

TPL2 RX chip select

→

PTC12/LPSPI2_PCS1

K4-6

TPL2RXCLK

TPL2 RX clock

→

PTB29/LPSPI2_SCK

K4-8

TPL2RXDATA

TPL2 RX data

→

PTB2/LPSPI2_SIN

K5-13

Debug1

GPIO for debugging purposes

←

PTE25

K5-15

Debug2

GPIO for debugging purposes

←

PTE26

K6-17

GUITXD

UART routed to connector J6 (UART)

→

PTE5/LPUART12_RX

K6-19

GUIRXD

UART routed to connector J6 (UART)

←

PTE4/LPUART12_TX

Table 7. Signal routing for S32K3x4EVB-Q172

UM11826

All information provided in this document is subject to legal disclaimers.

© 2022 NXP B.V. All rights reserved.

User manual

Rev. 1 — 6 September 2022

10 / 17

Summary of Contents for FRDMDUALK3664EVB

Page 1: ...FRDMDUALK3664EVB evaluation board Rev 1 6 September 2022 User manual Document information Information Content Keywords BMS TPL S32K344 Abstract This document is the user manual for dual MC33664 evaluation board ...

Page 2: ...4EVB evaluation board Rev Date Description 1 20220906 initial version Revision history UM11826 All information provided in this document is subject to legal disclaimers 2022 NXP B V All rights reserved User manual Rev 1 6 September 2022 2 17 ...

Page 3: ...ends on proper printed circuit board layout and heat sinking design as well as attention to supply filtering transient suppression and I O signal quality The product provided may not be complete in terms of required design marketing and or manufacturing related protective considerations including product safety measures typically found in the end device incorporating the product Due to the open co...

Page 4: ...L25Z MC33664 dual dual single VIO options 3 3 V 5 V 3 3 V 5 V 3 3 V 5 V Fault line support no no yes Table 1 MC33664 evaluation board EVB options 4 Finding kit resources and information on the NXP website NXP Semiconductors provides online resources for this evaluation board and its supported devices on http www nxp com The information page for FRDMDUALK3664EVB is at http www nxp com FRDMDUALK3664...

Page 5: ...aluate the features of the MC33664A device The evaluation board allows the user to connect serial peripheral interface SPI signals from the MCU to the device and be able to create bit pulses transmission to the bus through the transformer The messages received by the device can be converted bit by bit and transferred to the MCU by SPI 6 1 1 FRDMDUALK3664EVB features Two MC33664ATL1EG isolated comm...

Page 6: ...platform recommended S32K3x4EVB Q172 Table 2 Evaluation board component descriptions 6 2 1 MC33664 Isolated network high speed transceiver 6 2 1 1 General description The MC33664 is a SMARTMOS transceiver physical layer transformer driver designed to interface a microcontroller conveniently to a high speed isolated communication network MCU SPI data bits are directly converted to pulse bit informa...

Page 7: ...RXDATA TRANSFORMER ISOLATION isolation isolation TRANSFORMER ISOLATION Figure 3 Block diagram 6 2 1 3 Features 2 0 Mbit s isolated network communication rate Dual SPI architecture for message confirmation Robust conducted and radiated immunity with wake up 3 3 V and 5 0 V compatible logic thresholds Low Sleep mode current with automatic bus wake up Ultra low radiated emissions Option to access UAR...

Page 8: ...location of connectors on the board Figure 4 Evaluation board connector locations 6 2 2 1 TPL bus connectors The connectors J1 and J2 provide access to TPL1 and TPL2 bus Schematic label Signal name Description J1 1 TPL1RDTXP TPL bus 1 receive transmit input positive J1 2 TPL1RDTXN TPL bus 1 receive transmit input negative Table 4 TPL bus 1 connector J1 Schematic label Signal name Description J2 1 ...

Page 9: ...XCSB2 GND GND CSB0 R53 4 7 k VIO CSB2 R54 4 7 k VIO CSB1 R55 4 7 k Figure 5 TPL chain selection Selected CSB line active LOW Selected TPL line active LOW CSB0 TPL1 CSB1 TPL2 CSB2 TPL1 and TPL2 Table 6 TPL bus selection 6 2 2 2 MCU interface connectors The connectors K1 to K6 enable interface to an NXP microcontroller development platform The mechanical dimensions and pinout are selected to fit the...

Page 10: ...L1 and TPL2 TX clock PTE1 LPSPI0_SCK K4 13 TPL12TXDATA TPL1 and TPL2 TX data PTE2 LPSPI0_SOUT K2 5 TPL1RXCSB TPL1 RX chip select PTB17 LPSPI1_PCS3 K2 11 TPL1RXCLK TPL1 RX clock PTB14 LPSPI1_SCK K2 9 TPL1RXDATA TPL1 RX data PTB15 LPSPI1_SIN K4 10 TPL2RXCSB TPL2 RX chip select PTC12 LPSPI2_PCS1 K4 6 TPL2RXCLK TPL2 RX clock PTB29 LPSPI2_SCK K4 8 TPL2RXDATA TPL2 RX data PTB2 LPSPI2_SIN K5 13 Debug1 GP...

Page 11: ... TPL1 RX clock 7 GND ground 8 TPL1EN TPL1 enable Table 8 Connector J3 Pin Signal Description 1 GND ground 2 TPL2RXCSB TPL2 RX chip select 3 GND ground 4 TPL2RXDATA TPL2 RX data 5 GND ground 6 TPL2RXCLK TPL2 RX clock 7 GND ground 8 TPL2EN TPL2 enable Table 9 Connector J4 Pin Signal Description 1 GND ground 2 TPL1INTB TPL1 interrupt 3 GND ground 4 TPL2INTB TPL2 interrupt 5 GND ground 6 Debug1 option...

Page 12: ...the S32K3x4EVB Q172 board It can also be used in a standalone configuration For other configurations check mechanical and electrical fit or use for example a breadboard design 7 1 S32K3x4EVB Q172 board configuration The FRDMDUALK3664EVB is configured for the S32K3x4EVB Q172 board by default Ensure that the S32K3x4EVB is configured correctly before connecting both boards together Table 12 lists the...

Page 13: ...ided with 5 0 V VIO must be provided with 3 3 V or 5 0 V depending on the required communication signal levels 8 References 1 FRDMDUALK3664EVB detailed information on this board including documentation downloads and software and tools http www nxp com FRDMDUALK3664EVB 2 MC33664 product information on MC33664 isolated network high speed transceiver http www nxp com MC33664 3 S32K3x4EVB Q172 detaile...

Page 14: ...ervices a used in safety critical applications or b in which failure could lead to death personal injury or severe physical or environmental damage such products and services hereinafter referred to as Critical Applications then customer makes the ultimate design decisions regarding its products and is solely responsible for compliance with all legal regulatory safety and security related requirem...

Page 15: ... brands product names service names and trademarks are the property of their respective owners NXP wordmark and logo are trademarks of NXP B V UM11826 All information provided in this document is subject to legal disclaimers 2022 NXP B V All rights reserved User manual Rev 1 6 September 2022 15 17 ...

Page 16: ...ector J3 11 Tab 9 Connector J4 11 Tab 10 Connector J5 11 Tab 11 Connector UART J6 12 Tab 12 S32K3x4EVB Q172 recommended setting 12 Figures Fig 1 FRDMDUALK3664EVB 3 Fig 2 Evaluation board featured component locations 6 Fig 3 Block diagram 7 Fig 4 Evaluation board connector locations 8 Fig 5 TPL chain selection 9 Fig 6 FRDMDUALK3664EVB mounted on top of the S32K3x4EVB Q172 13 UM11826 All information...

Page 17: ... Modes of operation 7 6 2 2 Connectors 8 6 2 2 1 TPL bus connectors 8 6 2 2 2 MCU interface connectors 9 6 2 2 3 Logic analyzer interface connectors J3 J4 J5 11 6 2 3 Compatible NXP MCU development platforms 12 6 2 4 UART connector J6 12 6 3 Schematic board layout and bill of materials 12 7 Configuring the hardware 12 7 1 S32K3x4EVB Q172 board configuration 12 7 2 Standalone or other microcontroll...

Reviews:

No comments