NXP Semiconductors 8CH-DMIC, User Manual

Page: 8 / 25

Table 6. Interface connector pin detail (continued)
Pin Signal Direction
11 GND -
12 GND -
13 I2C_SCL I
14 I2C_SDA I/O
1.8 Jumpers
The following table describes the jumpers available on the board.
Table 7. Jumpers
Part
identifier Jumper type Description Settings
J2 1x2 header Jumper for SPH0641LM4H-1
MIC 1 (U3)
• Open: SELECT pin of SPH0641LM4H-1 MIC 1 (U3) is
powered by 1.8 V and asserts data on CLK_MIC1 rising
edge (default setting)
• Shorted: SELECT pin of SPH0641LM4H-1 MIC 1 (U3) is
grounded and asserts data on CLK_MIC1 falling edge
J3 1x2 header Jumper for SPH0641LM4H-1
MIC 2 (U5)
• Open: SELECT pin of SPH0641LM4H-1 MIC2 (U5)
is powered by 1.8 V and asserts data on CLK_MIC2
rising edge
• Shorted: SELECT pin of SPH0641LM4H-1 MIC2 (U5) is
grounded and asserts data on CLK_MIC2 falling edge
(default setting)
J4 1x2 header Jumper for SPH0641LM4H-1
MIC 6 (U10)
• Open: SELECT pin of SPH0641LM4H-1 MIC6 (U10)
is powered by 1.8 V and asserts data on CLK_MIC6
rising edge
• Shorted: SELECT pin of SPH0641LM4H-1 MIC6 (U10)
is grounded and asserts data on CLK_MIC6 falling edge
(default setting)
J5 1x3 header Jumper for selection of
CLK01 or CLK23 clock signal
• 1-2 shorted: CLK01 is connected and supplies the
clock (option1)
• 2-3 shorted: CLK23 is connected and supplies the clock
(default setting)
Combination of jumpers J5, J14, and
J15 provide several clock selection
options. For detail, see
Table 23 .
NOTE
J6 1x2 header Used to:
• Open: Data control and clock control signals for MIC
3 and MIC 9 are high, and MIC 3 and MIC 9 are not
enabled (default setting)
Table continues on the next page...
NXP Semiconductors
Overview
Eight-channel DMIC Board User Manual, Rev. 2, 15 March 2022
User Guide 8 / 25