NXP Semiconductors 8CH-DMIC Page 17 User Manual Download | Manualshive

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4DMIC[A] configuration

Table 14. 4DMIC[A] configuration

Part identifier

DMIC

Active Data and Clock signal

U1

DMIC0

DATA01 and CLK01

U5

DMIC2

U8

DMIC4

DATA23 and CLK23

U10

DMIC6

The figure below shows the 4DMIC[A] configuration.

MIC0

MIC1

MIC2

MIC3

MIC4

MIC5

MIC6

MIC7

MIC8

MIC9

MIC10

- Indicates active DMIC

- Indicates inctive DMIC

Figure 8. 4DMIC[A] configuration

4DMIC[B] configuration

Table 15. 4DMIC[B] configuration

Part identifier

DMIC

Active Data and Clock signal

U3

DMIC1

DATA01 and CLK01

U5

DMIC2

U11

DMIC7

DATA23 and CLK23

U2

DMIC8

The figure below shows the 4DMIC[B] configuration.

NXP Semiconductors

Functional Description

Eight-channel DMIC Board User Manual, Rev. 2, 15 March 2022

User Guide

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Summary of Contents for 8CH-DMIC

Page 1: ...Eight channel DMIC Board User Manual Supports Board Revision B NXP Semiconductors Document identifier 8CH DMIC UM User Guide Rev 2 15 March 2022 ...

Page 2: ...rs 8 1 9 LEDs 11 Chapter 2 Functional Description 12 2 1 Power supply 12 2 1 1 Main power supply 12 2 1 2 Secondary power supply 12 2 2 DMIC interface 12 2 2 1 DMIC configurations and signal connections 14 2 2 2 DMIC data switch 21 2 2 3 DMIC clock switch 22 Appendix A Revision history 24 NXP Semiconductors Eight channel DMIC Board User Manual Rev 2 15 March 2022 User Guide 2 25 ...

Page 3: ...microphone GPIO General purpose input output LED Light emitting diode MCU Microcontroller unit PCB Printed circuit board RF Radio frequency SMA Subminiature version a connector SPI Serial peripheral interface UART Universal asynchronous receiver transmitter 1 2 Related documentation The table below lists and explains the additional documents and resources that you can refer to for more information...

Page 4: ... Board Interface connector Clock Buffers CLK01 CLK23 CLK45 CLK67 Switch Matrix Switch Matrix DCDC VDD to 3 3V Regulator DMIC Array LEDC Array LED Driver DATA01 DATA23 DATA45 DATA67 I2C VDD 1 8V to 3 3V Configuration Jumpers 14 3 3V VDD VDD VDD CLK01 CLK23 CLK45 CLK67 VDD CLK01 CLK23 CLK45 CLK67 DATA01 DATA23 DATA45 DATA67 Figure 1 8 CH DMIC block diagram 1 5 Board pictures The figure below shows t...

Page 5: ...5 D3 D4 D5 D2 D6 D1 D7 Figure 2 8CH DMIC board top side The figure below shows the bottom side of the board and highlights the interface connector NXP Semiconductors Overview Eight channel DMIC Board User Manual Rev 2 15 March 2022 User Guide 5 25 ...

Page 6: ...Figure 3 8CH DMIC board bottom side 1 6 Board features The table below describes the DMIC board features NXP Semiconductors Overview Eight channel DMIC Board User Manual Rev 2 15 March 2022 User Guide 6 25 ...

Page 7: ...pers J5 J14 and J15 for use with boards that do not have all the clocks available Refer to Table 23 for settings DMIC array 11 DMICs at most eight DMICs are in use simultaneously DMIC data signals DATA01 DATA23 DATA45 DATA67 1 7 Connectors Table 5 Connector detail Part identifier Connector type Description J1 2x7 pin connector For 8 CH DMIC board connection with the main board The table below desc...

Page 8: ...grounded and asserts data on CLK_MIC2 falling edge default setting J4 1x2 header Jumper for SPH0641LM4H 1 MIC 6 U10 Open SELECT pin of SPH0641LM4H 1 MIC6 U10 is powered by 1 8 V and asserts data on CLK_MIC6 rising edge Shorted SELECT pin of SPH0641LM4H 1 MIC6 U10 is grounded and asserts data on CLK_MIC6 falling edge default setting J5 1x3 header Jumper for selection of CLK01 or CLK23 clock signal ...

Page 9: ...ata control and clock control signals for MIC 0 are low and MIC 0 is enabled default setting J10 1x2 header Used to control the data from ADG711 U15 switch and clock from ADG711 U19 switch for MIC 6 Open Data control and clock control signals for MIC 6 are high and MIC 6 is not enabled default setting Shorted Data control and clock control signals for MIC 6 are low and MIC 6 is enabled J11 1x2 hea...

Page 10: ... control and clock control signals for MIC 7 MIC 8 and MIC 10 are high and MIC 7 MIC 8 and MIC 10 are not enabled default setting Shorted Data control and clock control signals for MIC 7 MIC 8 and MIC 10 are high and MIC 7 MIC 8 and MIC 10 are enabled J14 1x3 header Jumper for selection of CLK01 or CLK45 clock signal 1 2 shorted CLK01 is connected and supplies the clock option1 2 3 shorted CLK45 i...

Page 11: ... color LED Placement Description When LED is ON D1 Blue Available on top of the plug in board User Programmable LEDs D2 Blue Available on top of the plug in board D3 Blue Available on top of the plug in board D4 Blue Available on top of the plug in board D5 Blue Available on top of the plug in board D6 Blue Available on top of the plug in board D7 Red Available on top of the plug in board next to ...

Page 12: ... interface connector 2 1 2 Secondary power supply The MCP1256T device U35 generates a 3 3 V output voltage from 1 8V input supply The 3 3 V power supply is used for Onboard LEDs D1 D7 SX1502I087TRT GPIO expander used for LEDs 2 2 DMIC interface A total of 11 DMICs are available on the DMIC board however at most eight DMICs are in use simultaneously The below figure describes the different DMICs pl...

Page 13: ...a on CLK_MIC0 falling edge U3 MIC1 Asserts data on CLK_MIC1 rising and falling edge depending upon jumper J2 setting U2 MIC8 Asserts data on CLK_MIC8 rising edge U4 MIC9 Asserts data on CLK_MIC9 falling edge U5 MIC2 Asserts data on CLK_MIC2 rising and falling edge depending upon jumper J3 setting U6 MIC3 Asserts data on CLK_MIC3 rising edge U7 MIC10 Asserts data on CLK_MIC10 rising edge Table cont...

Page 14: ...MIC configurations are possible on the board as follows 2DMIC 3DMIC A 3DMIC B 3DMIC C 4DMIC A 4DMIC B 5DMIC 6DMIC 7DMIC 8DMIC The below tables describe the different DMIC configurations and respective data and clock signals that are active for these configurations 2DMIC configuration Table 10 2DMIC configuration Part identifier DMIC Active Data and Clock signal U1 DMIC0 DATA01 and CLK01 U6 DMIC3 T...

Page 15: ...9 DATA23 and CLK23 The figure below shows the 3DMIC A configuration MIC0 MIC1 MIC2 MIC3 MIC4 MIC5 MIC6 MIC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 5 3DMIC A configuration 3DMIC B configuration Table 12 3DMIC B configuration Part identifier DMIC Active Data and Clock signal U1 DMIC0 DATA01 and CLK01 Table continues on the next page NXP Semiconductors Functional Descript...

Page 16: ...6 3DMIC B configuration 3DMIC C configuration Table 13 3DMIC C configuration Part identifier DMIC Active Data and Clock signal U1 DMIC0 DATA01 and CLK01 U6 DMIC3 U10 DMIC6 DATA23 and CLK23 The figure below shows the 3DMIC C configuration MIC0 MIC1 MIC2 MIC3 MIC4 MIC5 MIC6 MIC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 7 3DMIC C configuration NXP Semiconductors Functional ...

Page 17: ...4 MIC5 MIC6 MIC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 8 4DMIC A configuration 4DMIC B configuration Table 15 4DMIC B configuration Part identifier DMIC Active Data and Clock signal U3 DMIC1 DATA01 and CLK01 U5 DMIC2 U11 DMIC7 DATA23 and CLK23 U2 DMIC8 The figure below shows the 4DMIC B configuration NXP Semiconductors Functional Description Eight channel DMIC Board U...

Page 18: ...ata and Clock signal U3 DMIC1 DATA01 and CLK01 U5 DMIC2 U11 DMIC7 DATA23 and CLK23 U2 DMIC8 U7 DMIC10 DATA45 and CLK45 The figure below shows the 5DMIC configuration MIC0 MIC1 MIC2 MIC3 MIC4 MIC5 MIC6 MIC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 10 5DMIC configuration NXP Semiconductors Functional Description Eight channel DMIC Board User Manual Rev 2 15 March 2022 User...

Page 19: ...IC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 11 6DMIC configuration 7DMIC configuration Table 18 7DMIC configuration Part identifier DMIC Active Data and Clock signal U1 DMIC0 DATA01 and CLK01 U3 DMIC1 U5 DMIC2 DATA23 and CLK23 U6 DMIC3 U8 DMIC4 DATA45 and CLK45 U9 DMIC5 U10 DMIC6 DATA67 and CLK67 The figure below shows the 7DMIC configuration NXP Semiconductors Function...

Page 20: ... DMIC0 DATA01 and CLK01 U3 DMIC1 U5 DMIC2 DATA23 and CLK23 U6 DMIC3 U8 DMIC4 DATA45 and CLK45 U9 DMIC5 U10 DMIC6 DATA67 and CLK67 U7 DMIC10 The figure below shows the 8DMIC configuration MIC0 MIC1 MIC2 MIC3 MIC4 MIC5 MIC6 MIC7 MIC8 MIC9 MIC10 Indicates active DMIC Indicates inctive DMIC Figure 13 8DMIC configuration NXP Semiconductors Functional Description Eight channel DMIC Board User Manual Rev...

Page 21: ...h Four SPST switches ADG711 are used on the board to switch DMICs data out as an input for the main board The following table describes the data switches Table 21 DMIC data switch matrix Part identifier Input Data Output data Jumpers used see Jumpers U12 Input data from DMIC 0 DMIC 1 DMIC 2 DMIC 3 DATA01 J6 J7 J8 J9 U15 Input data from DMIC 2 DMIC 3 DMIC 4 DMIC 6 DATA23 J11 J12 J13 U18 Input data ...

Page 22: ...MIC3 DMIC4 J6 J11 J12 U19 Four input clocks CLK45 depending upon J14 and J15 jumpers setting CLK23 Or CLK01 depending upon J5 jumper setting CLK67 depending upon J14 and J15 jumpers setting CLK23 Or CLK01 depending upon J5 jumper setting Clock for DMIC5 DMIC6 DMIC7 J12 J10 J13 J12 U21 Four input clocks CLK23 Or CLK01 depending upon J5 jumper setting CLK23 Or CLK01 depending upon J5 jumper setting ...

Page 23: ... CLk67 CLK01 When using the 8CH DMIC board with the i MX RT600 EVK MIMXRT685 AUD EVK board the codec device on the MIMXRT685 AUD EVK board must have the MCLK clock frequency reduced to 4 096 MHz and the Input Sample Rate LRCK must be reduced to 16 kHz This change in clock frequency and LRCK maintains compliance of the MIMXRT685 AUD EVK board with mandatory FCC and EU EMC limitations Failure to do ...

Page 24: ... Table 24 Revision history Revision Date Topic cross reference Change description Rev 2 15 March 2022 Clock configuration jumper settings Added note Rev 1 12 January 2022 Initial public release NXP Semiconductors Eight channel DMIC Board User Manual Rev 2 15 March 2022 User Guide 24 25 ...

Page 25: ...ucts with security features that best meet rules regulations and standards of the intended application and make the ultimate design decisions regarding its products and is solely responsible for compliance with all legal regulatory and security related requirements concerning its products regardless of any information or support that may be provided by NXP NXP has a Product Security Incident Respo...

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