NXP Semiconductors 56858, User Manual

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Preface, Rev. 3
Freescale Semiconductor ix
Definitions, Acronyms, and Abbreviations
Definitions, acronyms and abbreviations for terms used in this document are defined below for
reference.
Codec
COder/DECoder; a part used to convert analog signals to digital (coder) and digital
signals to analog (decoder)
DIP
Dual Inline Package
EEPROM Electrically Erasable Programmable Read-Only Memory
EOnCE
Enhanced On-Chip Emulation; a debug bus and port created by Freescale to enable
a designer to create a low-cost hardware interface for a professional quality debug
environment
ESSI
Enhanced Synchronous Serial Interface; a communications port on Freescale’s
family of controllers
EVM
Evaluation Module; a hardware platform which allows a customer to evaluate the
silicon and develop his application.
GPIO General Purpose Input and Output port on Freescale’s family of controllers; does
not share pin functionality with any other peripheral on the chip and can only be
set as an input, output or level-sensitive interrupt input
HI
Host Interface; a communications port on Freescale’s family of controllers
IC Integrated Circuit
JTAG
Joint Test Action Group; a bus protocol/interface used for test and debug
LED Light Emitting Diode
LQFP
Low Profile Quad Flat Pack package
MPIO Multi Purpose Input and Output port on Freescale’s family of controllers; shares
package pins with other peripherals on the chip and can function as a GPIO
PCB
Printed Circuit Board
PLL Phase Locked Loop
RAM
Random Access Memory
ROM Read Only Memory
SCI
Serial Communications Interface; a communications port on Freescale’s family of
controllers