Register Format
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19
3.5
COS Setup Register
The PCI-7256 provides a Change-of-State(COS) interrupt function on any
one of digital input channel. This function allows users to monitor the status
of input channels. By enabling the COS Setup registers, it will generate an
interrupt when the corresponding channnel changes its state, whether a
rising edge signal or a falling edge signal. For more detailed information,
please refer to section 4.4.
Address: BASE + 0x06
Attribute: Write
7
6
5
4
3
2
1
0
COS
SET7
COS
SET6
COS
SET5
COS
SET4
COS
SET3
COS
SET2
COS
SET1
COS
SET0
15
14
13
12
11
10
9
8
COS
SET15
COS
SET14
COS
SET13
COS
SET12
COS
SET11
COS
SET10
COS
SET9
COS
SET8
COS SETx: change-of-state setup of DI channel x, x=0 ~15
1: enable the COS interrupt
0: disable the COS interrupt
3.6
COS Latch Register
When COS occurs, the COS Latch register will also latch the DI data. Once
the user clear the interrupt request, the COS Latch register will be cleared
automatically. The COS function releases the CPU from the burden of polling
all of the input channels, and enables the computer to handle higher I/O
performance.
Address: BASE + 0x06
Attribute: Read
7
6
5
4
3
2
1
0
CL7
CL6
CL5
CL4
CL3
CL2
CL1
CL0
15
14
13
12
11
10
9
8
CL15
CL14
CL13
CL12
CL11
CL10
CL9
CL8
CL x: COS latch register of DI channel x, x = 0 ~ 15
1: digital input voltage is in high level
0: digital input voltage is in low level
