Operation Theorem
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4.1.3 A/D Data Transfer Modes
On the ACL-8111, three A/D data transfer modes can be used when the
conversion is completed. The data transfer mode is controlled by the mode
control register (BASE+11). The different transfer modes are specified as
follows:
Software Data Transfer
Usually, this mode is used with software A/D trigger mode. After the A/D
conversion is triggered by software, the software should poll the
DRDY
bit
until it becomes to high level. Whenever the low byte of A/D data is read, the
DRDY
bit will be cleared to indicate the data is read out.
It is possible to read A/D converted data without polling. The A/D conversion
time will not excess 8
µ
s on ACL-8111 card. Hence, after software trigger, the
software can wait for at least 25
µ
s then read the A/D register without polling.
EOC Interrupt Transfer
The ACL-8111 provides hardware interrupt capability. Under this mode, an
interrupt signal is generated at end of A/D conversion (EOC) then the data is
ready to be read. It is useful to combine the interrupt transfer with the timer
pacer trigger mode. Under this mode, the data transfer is essentially
asynchronous with the control software.
When the interrupt transfer is used, you have to set the interrupt IRQ level by
hardware jumper. Please refer section 2.10 for IRQ jumper setting. After the
A/D conversion is completed, a hardware interrupt will be inserted and its
corresponding ISR (Interrupt Service Routine) will be invoked and executed.
The converted data is transferred by the ISR program.
