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NuDAQ ACL-8111 User Manual Download Page 39

C/C++ Library for DOS 

•

 33 

5 

C/C++ Library for DOS 

This chapter describes the DOS software library, which is free supplied. The 
DOS library software includes a utility program, C language library, and some 
demonstration programs, which can help you reduce the programming work. 

To program in Windows environment, please use ACLS-DLL2.  The function 
reference manual of ACLS-DLL2 is included in the ADLINK CD. It needs 
license. 

Summary of Contents for ACL-8111

Page 1: ...NuDAQ ACL 8111 16 bit High Resolution Data Acquisition Card User s Guide Recycled Paper...

Page 2: ......

Page 3: ...al damages arising out of the use or inability to use the product or documentation even if advised of the possibility of such damages This document contains proprietary information protected by copyri...

Page 4: ...nktech com Technical Support NuPRO EBC nupro adlinktech com TEL 886 2 82265877 FAX 886 2 82265717 Address 9F No 166 Jian Yi Road Chungho City Taipei 235 Taiwan Please email or FAX us of your detailed...

Page 5: ...2 6 Connectors Pin Assignments 14 2 7 Daughter Board Connection 16 2 7 1 Connect with ACLD 9137 16 2 7 2 Connect with ACLD 9182 16 2 7 3 Connect with ACLD 9185 16 2 7 4 Connect with ACLD 9188 17 Chap...

Page 6: ...rams 34 5 2 _8111_Initial 35 5 3 _8111_Switch_Card_No 36 5 4 _8111_DI 37 5 5 _8111_DI _Channel 38 5 6 _8111_DO 39 5 7 _8111_DA 40 5 8 _8111_AD_Set_Channel 41 5 9 _8111_AD_Set_Gain 42 5 10 _8111_AD_Set...

Page 7: ...Personal Computer and compatible computers The registers map is fully compatible with PCL 711B The ACL 8111 is designed to combine all the data acquisition functions such A D D A D O and D I in a sing...

Page 8: ...hannels On chip sample hold Variable input range 5V 2 5V 1 25V 0 625V and 0 3125V One 12 bit monolithic multiplying analog output channel 16 digital output channels 16 digital input channels Three A D...

Page 9: ...rial and laboratory ON OFF control Energy management Annunciation 16 TTL DTL compatible digital input channels Security controller Product test Period and pulse width measurement Event and frequency c...

Page 10: ...tection Continuous 35V maximum Accuracy 0 015 of reading 1 Bit LSB Input Impedance 10 M AD Clock Sources trigger modes Software trigger internal timer pacer and external pulse trigger Data Transfer Mo...

Page 11: ...V at 8 0mA Sink High Min 2 7V at 0 4mA Source Programmable Counter Device 82C54 A D pacer Source 32 bit timer two 16 bit counter cascaded together with a 2MHz time base Pacer Output 0 00046 Hz 100K Hz...

Page 12: ...6 Introduction 5 V 440 mA typical 12V 60 mA typical Dimension 158mm X 108mm...

Page 13: ...chase ACLS DLL2 or ACLD LVIEW 1 4 1 ACLS DLL2 For easily program the board under Windows environment we also provide ACLS DLL2 which include the DLL for Windows 95 98 NT With ACLS DLL2 you can use com...

Page 14: ...ows the installation procedures 1 Unpacking and check what you have 2 Check the PCB and the location of jumper and switch 3 Setup the jumpers according to the system and applications setting 4 Install...

Page 15: ...ract the system module and place it only on a grounded anti static surface component side up Again inspect the module for damage Press down on all the socketed IC s to make sure that they are properly...

Page 16: ...d switches are preset at the factory Please setup the switch and jumper according to the system setting and the application requirements A jumper is closed sometimes referred to as shorted with the pl...

Page 17: ...See Appendix A 3 The base address must not conflict with any add on card on your own PC Please check your PC before installing the ACL 8111 The ACL 8111 s base address is selected by a 6 position DIP...

Page 18: ...OFF 1 OFF 1 OFF 01 OFF 1 ON 0 OFF 1 A4 A9 are correspond to PC address lines How to Define a Base Address for the ACL 8111 The DIP1 to DIP6 in the switch SW1are one to one corresponding to the PC bus...

Page 19: ...tput range 0V 5V or 0V 10V respectively The setting of D A reference voltage is specified as following When you select 10V for the D A reference voltage you should be very careful the analog output Be...

Page 20: ...output signal The pin assignments for each connector are illustrated in the Figure 3 1 Figure 3 3 CN1 Analog input output 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 AI0 AI1 AI2 AI3 AI4 AI5 AI6 AI...

Page 21: ...1 12 13 14 15 16 17 18 19 20 CN 3 Digital Output Signals DO 0 15 DO 0 DO 2 DO 4 DO 6 DO 8 DO 10 DO 12 DO 14 GND 5V CN3 DO 1 DO 3 DO 5 DO 7 DO 9 DO 11 DO 13 DO 15 GND 12V 1 2 3 4 5 6 7 8 9 10 11 12 13...

Page 22: ...ex signal condition before the A D conversion is performed 2 7 2 Connect with ACLD 9182 The ACLD 9182 is a 16 channel isolated digital input board This board is connected with CN2 of ACL 8111 via 20 p...

Page 23: ...Installation 17 2 7 4 Connect with ACLD 9188 ACLD 9188 is a general purpose terminal board for the entire card which comes equipped with 37 pin D sub connector ACLD 9188 ACL 8111 CN2 CN3 CN1...

Page 24: ...se address and register descriptions Address Read Write Base 0 Counter 0 Counter 0 Base 1 Counter 1 Counter 1 Base 2 Counter 2 Counter 2 Base 3 Not Used Counter Control Base 4 A D low byte D A low byt...

Page 25: ...e status of A D conversion DRDY goes to low level means A D conversion is completed Address BASE 4 and BASE 5 Attribute read only Data Format Bit 7 6 5 4 3 2 1 0 BASE 4 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0...

Page 26: ...register the multiplexer switches to the new channel and waits for conversion Address BASE 10 Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE 10 X X X X X CL2 CL1 CL0 CLn multiplexer channel...

Page 27: ...ess BASE 9 Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE 9 X X X X X G2 G1 G0 Where G2 G1 and G0 are Gain selection G2 G1 G0 GAIN Input Range V 0 0 0 x1 5V Power Up Setting 0 0 1 x2 2 5V 0...

Page 28: ...ption 0 0 0 Software trigger with program polling 0 0 1 No interrupt generated 0 1 0 External trigger with program polling 0 1 1 External trigger with interrupt polling With End of conversion EOC inte...

Page 29: ...lag by just writing any data to this register let the ACL 8111 can generate next interrupt if a new A D conversion is happen Address BASE 8 Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 BASE 8...

Page 30: ...DI15 DI14 DI13 DI12 DI11 DI10 DI9 DI8 Address BASE 13 BASE 14 Attribute write only Data Format Bit 7 6 5 4 3 2 1 0 Base 13 DO7 DO6 DO5 DO4 DO3 DO2 DO1 DO0 Base 14 DO15 DO14 DO13 DO12 DO11 DO10 DO9 DO...

Page 31: ...Format 25 Note The D A registers are double buffered so that the D A analog output signals will not updated until the second high byte is written This can insure a single step transition when the D A...

Page 32: ...n D A conversion and digital I O The operation theorem can help you to understand how to manipulate and to program the ACL 8111 4 1 A D Conversion Before programming the ACL 8111 to perform the A D co...

Page 33: ...and the timer pacer trigger which is controlled by the A D operation mode control register BASE 11 The A D operation modes combine the AD clock sources and the data transfer mode together Please also...

Page 34: ...MHz Oscillator Vcc Timer Pacer 8253 Timer Counter Not Used The maximum pacer signal rate is 2MHz 4 500K which excess the maximum A D conversion rate of the ACL 8111 The minimum signal rate is 2MHz 655...

Page 35: ...ll not excess 8 s on ACL 8111 card Hence after software trigger the software can wait for at least 25 s then read the A D register without polling EOC Interrupt Transfer The ACL 8111 provides hardware...

Page 36: ...tionship between the digital number DAn and the output voltage is formulated as following Vout Vref DAn 4096 Where the Vref is the reference voltage the Vout is the output voltage and the DAn is the d...

Page 37: ...isters of the ACL 8111 the low byte must be written before the high byte This procedure can insure a single step transition when the D A conversion Note when writing digital data to D A register the l...

Page 38: ...put DO Digital GND DGND Digital Input DI From TTL Signal To TTL Devices ACL 8111 Outside Device 74LS244 74LS373 Figure 4 3 Digital I O Connection To program digital I O operation is fairly straightfor...

Page 39: ...e supplied The DOS library software includes a utility program C language library and some demonstration programs which can help you reduce the programming work To program in Windows environment pleas...

Page 40: ...ory X indicates the CD ROM drive X CD NuDAQISA 8111 3 Execute the setup batch program to install the software X NuDAQISA 8111 SETUP 5 1 2 Running Utility After finishing the installation you can execu...

Page 41: ...ard_number int base_addresss Argument card_number the card number to be initialized only two cards can be initialized the card number must be CARD_1 or CARD_2 base_address the I O port base address of...

Page 42: ...gument card_number The card number to be initialized only two cards can be initialized the card number must be CARD_1 or CARD_2 Return Code ERR_NoError ERR_InvalidBoardNumber Example include aclerr h...

Page 43: ...ed as low byte and the bit 8 to bit 15 are defined as the high byte Syntax int _8111_DI int port_number unsigned char data Argument port_number To indicate which port is read DI_LO_BYTE or DI_HI_BYTE...

Page 44: ...Note channel means each bit of digital input ports Syntax int _8111_DI_Channel int di_ch_no unsigned int data Argument di_ch_no the DI channel number the value has to be set from 0 to 15 data return v...

Page 45: ...O_HI_BYTE port Syntax int _8111_DO int port_number unsigned char data Argument port_number DO_LO_BYTE or DO_HI_BYTE data value will be written to digital output port Return Code ERR_NoError ERR_BoardN...

Page 46: ...d int data Argument data D A converted value if the value is greater than 4095 the higher 4 bits are negligent Return Code ERR_NoError ERR_BoardNoInit ERR_InvalidDAChannel Example include aclerr h inc...

Page 47: ...tial state is channel 0 which is a default setting by the ACL 8111 hardware configuration Syntax int _8111_AD_Set_Channel int ad_ch_no Argument ad_ch_no channel number to perform AD conversion Return...

Page 48: ...ationship between analog input voltage range gain and input mode are specified by following tables Input Range V Gain Gain Code 5 V X 1 AD_GAIN_1 2 5 V X 2 AD_GAIN_2 1 25 V X 4 AD_GAIN_4 0 625 V X 8 A...

Page 49: ...upt Transfer AD_MODE_2 External Trigger Software Polling Transfer AD_MODE_3 External Trigger Interrupt Transfer AD_MODE_4 Timer Trigger Software Polling Transfer AD_MODE_5 Timer Trigger Interrupt Tran...

Page 50: ...on is called a trigger pulse will be generated and the converted data will be stored in the base address Base 4 and Base 5 and can be retrieved by function _8111_AD_Aquire Please refer to section 6 11...

Page 51: ...d within 0 to 4095 Return Code ERR_NoError ERR_BoardNoInit ERR_AD_AquireTimeOut Example include aclerr h include 8111 h main int ad_data int ErrCode _8111_Initial CARD_1 0x220 Assume NoError when Init...

Page 52: ...t request which requested by the ACL 8111 If you use interrupt to transfer A D converted data you should use this function to clear interrupt request status otherwise no new coming interrupt will be g...

Page 53: ...t int ad_ch_no int ad_range int irq_ch_no int count int ad_buffer unsigned int c1 unsigned int c2 Argument ad_ch_no A D channel number ad_range A D analog input range please refer to section 6 9 for t...

Page 54: ...Init ERR_AD_INTNotSet Example See demo program AD_Demo2 C 5 16 _8111_AD_INT_Stop Description This function is used to stop the interrupt data transfer function After executing this function the intern...

Page 55: ...me of the AD converter the highest sampling rate of the ACL 8111 can not be exceeded 30 KHz Thus the multiplication of the dividers must be larger than 70 Syntax int _8111_AD_Timer unsigned int c1 uns...

Page 56: ...11 to an accuracy condition Note Your ACL 8111 board has been carefully calibrated in the factory before it is shipped to you 6 1 What do you need Before calibrating your ACL 8111 card you should prep...

Page 57: ...offset and full scale of D A channel can be turned through VR1 and VR2 The full scale gain of D A is adjusted by VR1 and zero offsets are adjusted by VR2 Note A precision voltmeter to measure the D A...

Page 58: ...are as follows 1 Set the analog input range as 5V i e the gain 1 2 Short the A D channel 0 pin 1 of CN1 to ground GND and connect the TP1 and TP2 with your DVM Trim the variable resister VR5 to obtain...

Page 59: ...uage Library easily The description of these programs are specified as follows AD_DEMO1 C A D conversion uses software trigger and program data transfer AD_DEMO2 C A D conversion uses interrupt and pr...

Page 60: ...esponsible for any loss of data Please ensure the use of properly licensed software with our systems ADLINK does not condone the use of pirated software and will not service systems using such softwar...

Page 61: ...INK technicians Products with altered and or damaged serial numbers are not entitled to our service This warranty is not transferable or extendible Other categories not protected under our warranty 4...

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