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TX 1373A Transmitter
1-5
PA after being amplified, while part of it is fed back to the other port of the MOSFET. The
transistor detects the difference between these two signals and increases or decreases the
signal out to the PA, depending on the signal levels from the oscillator.
Signals in:7
5 MHz RF from oscillator.
Signals out:
RF to PA, app. +20 dBm
DRV_AGC: control voltage to monitor.
POWER AMPLIFIER
The Power Amplifier stage is implemented by three cascaded stages, with the two first
being bipolar MRF 553 transistors that are collector modulated. The modulation voltage is 0-
12VDC both at stage one and stage two. With an input signal from oscillator / AGC of +20
dBm, the first stage will d30 dBm peak power with a dynamic range of 25 dB. A 10 dB
resistive
π
-attenuator is inserted before stage two. The input to the second stage will then be
+20 dBm. After amplification and modulation, the peak power will be +30 dB, but the dynamic
range is increased to 50 dB. The last stage is a MRF 171 MOSFET transistor designed to
deliver high power output. It is biased by 1mA and +20VDC drain voltage. After amplification,
the peak power will be +43 dBm with a dynamic range of 75-80 dB.
The TX is capable of delivering 4W carrier power.
Signals in:
75 MHz RF from oscillator / AGC.
Modulation voltages, up to +12VDC.
Power Supply, +20 VDC.
Bias, 0-5 V, to power stage.
Signals out:
RF to detector / LP Filter.
LOW PASS FILTER
The output signal from the PA is filtered to remove harmonic frequencies. The filter is a seven
pole passive lowpass filter.
Signals in:
75 MHz RF PA.
Signals out:
RF to CI 1376.
MODULATION DETECTOR
Part of the output signal is demodulated for feedback and self test purposes. The signal is
tapped out via a hybrid coupler to avoid destructive coupling from the detector to the output
signal and make sure the detected signal is good. The detection is achieved by a mixer and
linear detector. The output is used both as feedback to the modulation control circuitry, and
sent to the monitoring circuit where RF level and keying envelope are detected.
Signals in:
RF_In from PA.
Signals out:
DET_SIGN to modulation control circuitry.
LO_LEVEL to monitor.
LF-GENERATOR
A Field Programmable Gate Array (FPGA) clocked by a 4.9152 MHz oscillator, EEPROM and
other digital circuits generate the LF signals. The generated LF frequency is a square wave
that is converted to a sinusoidal signal by filtering off the higher order harmonics. The main
Summary of Contents for 7050
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Page 2: ... 1999 Navia Aviation AS ...
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